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PCM3002/3003
PCM3002
PCM3003
PCM3002
PCM3003
FEATURES
q
MONOLITHIC 20-BIT
ADC AND DAC
q
16-/20-BIT
INPUT/OUTPUT DATA
q
SOFTWARE CONTROL: PCM3002
q
HARDWARE CONTROL: PCM3003
q
STEREO ADC:
Single-Ended Voltage Input
64 X Oversampling
High Performance
THD+N: 86dB
SNR: 90dB
Dynamic Range: 90dB
q
STEREO DAC:
Single-Ended Voltage Output
Analog Low Pass Filter
64X Oversampling
High Performance
THD+N: 86dB
SNR: 94dB
Dynamic Range: 94dB
q
SPECIAL FEATURES
Digital De-emphasis
Digital Attenuation (256 Steps)
Soft Mute
Digital Loop Back
Power Down: ADC/DAC Independent
q
SAMPLING RATE: Up to 48kHz
q
SYSTEM CLOCK: 256f
S
, 384f
S
, 512f
S
q
SINGLE +3V POWER SUPPLY
q
SMALL PACKAGE: SSOP-24
16-/20-Bit Single-Ended Analog Input /Output
STEREO AUDIO CODECs
TM
DESCRIPTION
The PCM3002 and PCM3003 are low cost single chip
stereo audio CODECs (analog-to-digital and digital-to-
analog converters) with single-ended analog voltage
input and output.
The ADCs and DACs employ delta-sigma modulation
with 64X oversampling. The ADCs include a digital
decimation filter, and the DACs include an 8X
oversampling digital interpolation filter. The DACs
also include digital attenuation, de-emphasis, infinite
zero detection and soft mute to form a complete
subsystem. PCM3002 and PCM3003 operate with
left-justified, and right-justified formats, while the
PCM3002 also supports the I
2
S data format.
PCM3002 and PCM3003 provide a power-down mode
that operates on the ADCs and DACs independently.
Fabricated on a highly advanced CMOS process,
PCM3002 and PCM3003 are suitable for a wide vari-
ety of cost-sensitive consumer applications where good
performance is required.
PCM3002's programmable functions are controlled
by software and the PCM3003's functions include de-
emphasis, power down, and audio data format selec-
tions, which are controlled by hardware.
1997 Burr-Brown Corporation
PDS-1414C
Printed in U.S.A. January, 2000
Lch In
Rch In
Analog Front-End
Delta-Sigma
Modulator
Digital
Decimation
Filter
Serial Interface
and
Mode Control
Digital Out
Digital In
Serial Mode Control
System Clock
Lch Out
Rch Out
Low Pass Filter
and
Output Buffer
Multi-Level
Delta-Sigma
Modulator
Digital
Interpolation
Filter
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111
Twx: 910-952-1111 Internet: http://www.burr-brown.com/ Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
For most current data sheet and other product
information, visit www.burr-brown.com
PCM3002/3003
2
SPECIFICATIONS
All specifications at +25
C, V
DD
= V
CC
= 3.0V, f
S
= 44.1kHz, SYSCLK = 384f
S
, and 16-bit data, unless otherwise noted.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no
responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice.
No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN
product for use in life support devices and/or systems.
NOTES: (1) Pins 7, 8, 17 and 18: RST, ML, MD, MC for the PCM3002; PDAD, PDDA, DEM1, DEM0 for PCM3003 (Schmitt-Trigger input with 100k
typical internal
pull-down resistor). (2) Pins 9, 10, 11, 15: SYSCLK, LRCIN, BCKIN, DIN (Schmitt Trigger input). (3) Pin16: 20BIT for PCM3003 (Schmitt-Trigger input, 100k
typical internal pull-down resistor). (4) Pin 12: DOUT. (5) Pin 16: ZFLG (open drain output). (6) High Pass Filter for Offset Cancel. (7) Refer to Application Bulletin
AB-148 for information relating to operation at lower sampling frequencies. (8) f
IN
= 1kHz, using Audio Precision System II, rms mode with 20kHz LPF, 400Hz
HPF used for performance calculation. (9) f
OUT
= 1kHz, using Audio Precision System II, r ms mode with 20kHz LPF, 400Hz HPF used for performance calculation.
(10) Applies for voltages between 2.4V to 2.7V for 0
C to +70
C and 256f
S
/512f
S
operation (384f
S
not available). (11) SYSCLK, BCKIN, and LRCIN are stopped.
PCM3002E/3003E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUT/OUTPUT
Input Logic
Input Logic Level: V
IH
(1, 2, 3)
0.7 x V
DD
VDC
V
IL
(1, 2, 3)
0.3 x V
DD
VDC
Input Logic Current: I
IN
(2)
1
A
Input Logic Current: I
IN
(1)
100
A
Output Logic
Output Logic Level: V
OH
(5)
I
OUT
= 1mA
V
DD
0.3
VDC
V
OL
(5)
I
OUT
= +1mA
0.3
VDC
Output Logic Level: V
OL
(4)
I
OUT
= +1mA
0.3
VDC
CLOCK FREQUENCY
Sampling Frequency (f
S
)
32
(7)
44.1
48
kHz
System Clock Frequency
256f
S
8.1920
11.2896
12.2880
MHz
384f
S
12.2880
16.9344
18.4320
MHz
512f
S
16.3840
22.5792
24.5760
MHz
ADC CHARACTERISTICS
RESOLUTION
20
Bits
DC ACCURACY
Gain Mismatch Channel-to-Channel
1.0
3.0
% of FSR
Gain Error
2.0
5.0
% of FSR
Gain Drift
20
ppm of FSR/
C
Bipolar Zero Error
High-Pass Filter Disabled
(6)
1.7
% of FSR
Bipolar Zero Drift
High-Pass Filter Disabled
(6)
20
ppm of FSR/
C
DYNAMIC PERFORMANCE
(8)
THD+N: V
IN
= 0.5dB
86
80
dB
V
IN
= 60dB
28
dB
Dynamic Range
A-Weighted
86
90
dB
Signal-to-Noise Ratio
A-Weighted
86
90
dB
Channel Separation
84
88
dB
DIGITAL FILTER PERFORMANCE
Passband
0.454f
S
Hz
Stopband
0.583f
S
Hz
Passband Ripple
0.05
dB
Stopband Attenuation
65
dB
Delay Time
17.4/f
S
sec
HPF Frequency Response
3dB
0.019f
S
mHz
ANALOG INPUT
Voltage Range
0.60 V
CC
Vp-p
Center Voltage
0.50 V
CC
V
Input Impedance
30
k
Anti-Aliasing Filter Frequency Response
3dB
150
kHz
3
PCM3002/3003
SPECIFICATIONS
All specifications at +25
C, V
DD
= V
CC
= 3.0V, f
S
= 44.1kHz, SYSCLK = 384f
S
, CLKIO Input, 18-bit data, unless otherwise noted.
PCM3002E/3003E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
+V
DD
, +V
CC
1, +V
CC
2 ...................................................................... +6.5V
Supply Voltage Differences ...............................................................
0.1V
GND Voltage Differences ..................................................................
0.1V
Digital Input Voltage ...................................................... 0.3 to V
DD
+ 0.3V
Analog Input Voltage ......................................... 0.3 to V
CC
1,
V
CC
2 + 0.3V
Power Dissipation .......................................................................... 300mW
Input Current ...................................................................................
10mA
Operating Temperature Range ......................................... 25
C to +85
C
Storage Temperature ...................................................... 55
C to +125
C
Lead Temperature (soldering, 5s) .................................................. +260
C
(reflow, 10s) ..................................................... +235
C
ABSOLUTE MAXIMUM RATINGS
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
DAC CHARACTERISTICS
RESOLUTION
20
Bits
DC ACCURACY
Gain Mismatch Channel-to-Channel
1.0
3
% of FSR
Gain Error
1.0
5
% of FSR
Gain Drift
20
ppm of FSR/
C
Bipolar Zero Error
1.0
% of FSR
Bipolar Zero Drift
20
ppm of FSR/
C
DYNAMIC PERFORMANCE
(9)
THD+N: V
OUT
= 0dB (Full Scale)
86
80
dB
V
OUT
= 60dB
28
dB
Dynamic Range
EIAJ, A-Weighted
88
94
dB
Signal-to-Noise Ratio
EIAJ, A-Weighted
88
94
dB
Channel Separation
86
91
dB
DIGITAL FILTER PERFORMANCE
Passband
0.445f
S
Hz
Stopband
0.555f
S
Hz
Passband Ripple
0.17
dB
Stopband Attenuation
35
dB
Delay Time
11.1/f
S
sec
ANALOG OUTPUT
Voltage Range
0.60 x V
CC
Vp-p
Center Voltage
0.5 x V
CC
VDC
Load Impedance
AC-Coupling
10
k
LPF Frequency Response
f = 20kHz
0.16
dB
POWER SUPPLY REQUIREMENTS
Voltage Range: V
CC
, V
DD
25
C to +85
C
2.7
3.0
3.6
VDC
0
C to +70
C
(10)
2.4
3.0
3.6
VDC
Supply Current: Operation
V
CC
= V
DD
= 3.0V
18
24
mA
Power-Down
V
CC
= V
DD
= 3.0V
50
A
Power Dissipation: Operation
V
CC
= V
DD
= 3.0V
54
72
mW
Power-Down
(11)
V
CC
= V
DD
= 3.0V
150
W
TEMPERATURE RANGE
Operation
25
+85
C
Storage
55
+125
C
Thermal Resistance,
JA
100
C/W
PACKAGE
SPECIFIED
DRAWING
TEMPERATURE
PACKAGE
ORDERING
TRANSPORT
PRODUCT
PACKAGE
NUMBER
RANGE
MARKING
NUMBER
(1)
MEDIA
PCM3002E
SSOP-24
338
25
C to +85
C
PCM3002E
PCM3002E
Rails
"
"
"
"
"
PCM3002E/2K
Tape and Reel
PCM3003E
SSOP-24
338
25
C to +85
C
PCM3003E
PCM3003E
Rails
"
"
"
"
"
PCM3003E/2K
Tape and Reel
NOTES: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K indicates 2000 devices per reel). Ordering 2000 pieces
of "PCM3002E/2K" will get a single 2000-piece Tape and Reel.
PACKAGE/ORDERING INFORMATION
PCM3002/3003
4
V
CC
1
V
CC
1
V
IN
R
V
REF
L
V
REF
R
V
IN
L
PDAD
PDDA
SYSCLK
LRCIN
BCKIN
DOUT
V
CC
2
AGND1
AGND2
V
COM
V
OUT
R
V
OUT
L
DEM0
DEM1
20BIT
DIN
V
DD
DGND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
PCM3003
V
CC
1
V
CC
1
V
IN
R
V
REF
L
V
REF
R
V
IN
L
RST
ML
SYSCLK
LRCIN
BCKIN
DOUT
V
CC
2
AGND1
AGND2
V
COM
V
OUT
R
V
OUT
L
MC
MD
ZFLG
DIN
V
DD
DGND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
PCM3002
PIN CONFIGURATION--PCM3002
PIN CONFIGURATION--PCM3003
Top View
SSOP
Top View
SSOP
PIN
NAME
I/O
DESCRIPTION
1
V
CC
1
--
ADC Analog Power Supply
2
V
CC
1
--
ADC Analog Power Supply
3
V
IN
R
IN
ADC Analog Input, Rch
4
V
REF
L
--
ADC Reference, Lch
5
V
REF
R
--
ADC Reference, Rch
6
V
IN
L
IN
ADC Analog Input, Lch
7
RST
IN
Reset, Active LOW
(1, 2)
8
ML
IN
Strobe Pulse for Mode Control
(1, 2)
9
SYSCLK
IN
System Clock Input
(2)
10
LRCIN
IN
Sample Rate Clock Input (f
S
)
(2)
11
BCKIN
IN
Bit Clock Input
(2)
12
DOUT
OUT
Data Output
13
DGND
--
Digital Ground
14
V
DD
--
Digital Power Supply
15
DIN
IN
Data Input
(2)
16
ZFLG
OUT
Zero Flag Output, Active LOW
(3)
17
MD
IN
Serial Data for Mode Control
(1, 2)
18
MC
IN
Bit Clock for Mode Control
(1, 2)
19
V
OUT
L
OUT
DAC Analog Output, Lch
20
V
OUT
R
OUT
DAC Analog Output, Rch
21
V
COM
--
ADC/DAC Common
22
AGND2
--
DAC Analog Ground
23
AGND1
--
ADC Analog Ground
24
V
CC
2
--
DAC Analog Power Supply
NOTES: (1) With 100k
typical internal pull-down resistor. (2) Schmitt-Trigger
input. (3) Open drain output.
PIN ASSIGNMENTS--PCM3002
PIN
NAME
I/O
DESCRIPTION
1
V
CC
1
--
ADC Analog Power Supply
2
V
CC
1
--
ADC Analog Power Supply
3
V
IN
R
IN
ADC Analog Input, Rch
4
V
REF
L
--
ADC Reference, Lch
5
V
REF
R
--
ADC Reference, Rch
6
V
IN
L
IN
ADC Analog Input, Lch
7
PDAD
IN
ADC Power Down, Active LOW
(1, 2)
8
PDDA
IN
DAC Power Down, Active LOW
(1, 2)
9
SYSCLK
IN
System Clock Input
(2)
10
LRCIN
IN
Sample Rate Clock Input (f
S
)
(2)
11
BCKIN
IN
Bit Clock Input
(2)
12
DOUT
OUT
Data Output
13
DGND
--
Digital Ground
14
V
DD
--
Digital Power Supply
15
DIN
IN
Data Input
16
20BIT
IN
20-Bit Format Select
(1, 2)
17
DEM1
IN
De-emphasis Control
(1, 2)
18
DEM0
IN
De-emphasis Control 0
(1, 2)
19
V
OUT
L
OUT
DAC Analog Output, Lch
20
V
OUT
R
OUT
DAC Analog Output, Rch
21
V
COM
--
ADC/DAC Common
22
AGND2
--
DAC Analog Ground
23
AGND1
--
ADC Analog Ground
24
V
CC
2
--
DAC Analog Power Supply
NOTE: (1) With 100k
typical internal pull-down resistor. (2) Schmitt-Trigger
input.
PIN ASSIGNMENTS--PCM3003
5
PCM3002/3003
TYPICAL PERFORMANCE CURVES
ADC SECTION
At T
A
= +25
C, V
CC
= V
DD
= 3.0V, f
S
= 44.1kHz, f
SYSCLK
= 384f
S
, and F
SIGNAL
= 1kHz, unless otherwise noted.
THD+N vs TEMPERATURE
Temperature (C)
THD+N at 0.5dB (%)
0.010
0.008
0.006
0.004
0.002
25
0
25
50
75
85
100
THD+N at 60dB (%)
5.0
4.0
2.0
3.0
1.0
60dB
0.5dB
DYNAMIC RANGE and SNR vs TEMPERATURE
Temperature (C)
Dynamic Range (dB)
94
92
90
88
86
25
0
25
50
75
85
100
SNR (dB)
5.0
4.0
2.0
3.0
1.0
SNR
Dynamic Range
DYNAMIC RANGE and SNR vs SUPPLY VOLTAGE
Supply Voltage
(V)
Dynamic Range (dB)
94
92
90
88
86
2.4
2.7
3.0
3.3
3.6
SNR (dB)
94
92
90
88
86
Dynamic Range
SNR
THD+N vs SUPPLY VOLTAGE
Supply Voltage
(V)
THD+N at 0.50dB (%)
0.010
0.008
0.006
0.004
0.002
2.4
2.7
3.0
3.3
3.6
THD+N at 60dB (%)
5.0
4.0
3.0
2.0
1.0
60dB
0.5dB
THD+N vs SAMPLING FREQUENCY
f
S
(kHz)
THD+N at 0.5dB (%)
0.010
0.008
0.006
0.004
0.002
32
44.1
48
THD+N at 60dB (%)
5.0
4.0
3.0
2.0
1.0
60dB
0.5dB
DYNAMIC RANGE and SNR vs SAMPLING FREQUENCY
f
S
(kHz)
Dynamic Range (dB)
94
92
90
88
86
32
44.1
48
SNR (dB)
94
92
90
88
86
Dynamic Range
SNR
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