2004 California Micro Devices Corp. All rights reserved.
08/12/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
1
CM2009
VGA Port Companion Circuit
Features
Includes ESD protection, level-shifting, buffering
and sync impedance matching
7 channels of ESD protection for all VGA port con-
nector pins meeting IEC-61000-4-2 Level 4 ESD
requirements (
8kV contact discharge)
Very low loading capacitance from ESD protection
diodes on VIDEO lines, 4pF maximum
5V drivers for HSYNC and VSYNC lines
Integrated impedance matching resistors on sync
lines
Bi-directional level shifting N-channel FETs pro-
vided for DDC_CLK & DDC_DATA channels
Backdrive protection on DDC lines
Compact 16-lead QSOP package
Applications
VGA and DVI-I ports in:
- Desktop and Notebook PCs
- Graphics Cards
- Set Top Boxes
Product Description
The CM2009 connects between a video graphics con-
troller embedded in a PC, graphics adapter card or set
top box and the VGA or DVI-I port connector. The
CM2009 incorporates ESD protection for all signals,
level shifting for the DDC signals and buffering for the
SYNC signals. ESD protection for the video, DDC and
SYNC lines is implemented with low-capacitance cur-
rent steering diodes.
All ESD diodes are designed to safely handle the high
current spikes specified by IEC-61000-4-2 Level 4
(
8KV contact discharge if C
BYP
is present,
4KV if
not). The ESD protection for the DDC signal pins are
designed to prevent "back current" when the device is
powered down while connected to a monitor that is
powered up.
Separate positive supply rails are provided for the
VIDEO, DDC and SYNC channels to facilitate interfac-
ing with low voltage video controller ICs to provide
design flexibility in multi-supply-voltage environments.
(cont'd next page)
Simplified Electrical Schematic
VIDEO_1
VIDEO_2
VIDEO_3
V
CC_VIDEO
GND
SYNC_OUT2
GND
V
CC_DDC
V
CC_SYNC
SYNC_OUT1
SYNC_IN2
SYNC_IN1
DDC_IN2
DDC_IN1
R
T
3
4
5
6
10
11
13
15
1
8
2
14
16
DDC_OUT2
DDC_OUT1
12
9
BYP
R
T
7
2004 California Micro Devices Corp. All rights reserved.
2
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
08/12/04
CM2009
Product Description (cont'd)
Two non-inverting drivers provide buffering for the
HSYNC and VSYNC signals from the video controller
IC (SYNC1, SYNC2). These buffers accept TTL input
levels and convert them to CMOS output levels that
swing between Ground and V
CC_SYNC
, which is typi-
cally 5V. Additionally, each driver has a series termina-
tion resistor (R
T
) connected to the SYNC_OUT pin,
eliminating the external termination resistors typically
required for the HSYNC and VSYNC lines of the video
cable. There are three versions with different values of
R
T
to allow termination at typically 65
(CM2009-00)
or 55
(CM2009-01) or 15
(CM2009-02).
The 15
(CM2009-02) version will typically require two
external resistors which can be chosen to exactly
match the characteristic impedance of the SYNC lines
of the video cable.
Two N-channel MOSFETs provide the level shifting
function required when the DDC controller is operated
at a lower supply voltage than the monitor. The gate
terminals for these MOSFETS (V
CC_DDC
) should be
connected to the supply rail (typically 3.3V) that sup-
plies power to the transceivers of the DDC controller.
Ordering Information
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
PACKAGE / PINOUT DIAGRAM
Note: This drawing is not to scale.
Top View
16 Pin QSOP
1
2
3
4
14
13
12
11
5
6
7
10
9
8
15
16
SYNC_OUT2
SYNC_IN2
SYNC_OUT1
SYNC_IN1
DDC_OUT2
DDC_IN2
DDC_IN1
V
CC_SYNC
V
CC_VIDEO
VIDEO_1
VIDEO_2
VIDEO_3
GND
V
CC_DDC
DDC_OUT1
BYP
PART NUMBERING INFORMATION
R
OUT
Pins
Package
Standard Finish
Lead-free Finish
Ordering Part
Number
1
Part Marking
Ordering Part
Number
1
Part Marking
65
16
QSOP
CM2009-00QS
CM2009-00QS
CM2009-00QR
CM2009-00QR
55
16
QSOP
CM2009-01QS
CM2009-01QS
CM2009-01QR
CM2009-01QR
15
16
QSOP
CM2009-02QS
CM2009-02QS
CM2009-02QR
CM2009-02QR
2004 California Micro Devices Corp. All rights reserved.
08/12/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
3
CM2009
Pin Description
Specifications
PIN DESCRIPTIONS
LEAD(s)
NAME
DESCRIPTION
1
V
CC_SYNC
This is an isolated supply input for the SYNC_1 and SYNC_2 level shifters and their associ-
ated ESD protection circuits.
2
V
CC_VIDEO
This is a supply pin specifically for the VIDEO_1, VIDEO_2 and VIDEO_3 ESD protection cir-
cuits.
3
VIDEO_1
Video signal ESD protection channel. This pin is typically tied one of the video lines between
the VGA controller device and the video connector.
4
VIDEO_2
Video signal ESD protection channel. This pin is typically tied one of the video lines between
the VGA controller device and the video connector.
5
VIDEO_3
Video signal ESD protection channel. This pin is typically tied one of the video lines between
the VGA controller device and the video connector.
6
GND
Ground reference supply pin.
7
V
CC_DDC
This is an isolated supply input for the DDC_1 and DDC_2 level-shifting N-FET gates.
8
BYP
This input is used to connect an external 0.2uF bypass capacitor to the DDC circuits, resulting
in an increased ESD withstand voltage rating for these circuits (
8kV with vs. 4kV without).
9
DDC_OUT1
DDC signal output. Connects to the video connector side of one of the sync lines.
10
DDC_IN1
DDC signal input. Connects to the VGA controller side of one of the sync lines.
11
DDC_IN2
DDC signal input. Connects to the VGA controller side of one of the sync lines.
12
DDC_OUT2
DDC signal output. Connects to the video connector side of one of the sync lines.
13
SYNC_IN1
Sync signal buffer input. Connects to the VGA controller side of one of the sync lines.
14
SYNC_OUT1
Sync signal buffer output. Connects to the video connector side of one of the sync lines.
15
SYNC_IN2
Sync signal buffer input. Connects to the VGA controller side of one of the sync lines.
16
SYNC_OUT2
Sync signal buffer output. Connects to the video connector side of one of the sync lines.
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNITS
V
CC_VIDEO
,V
CC_DDC
and
V
CC_SYNC
Supply Voltage Inputs
[GND - 0.5] to +6.0
V
ESD Diode Forward Current (one diode conducting at a time)
10
mA
DC Voltage at Inputs
VIDEO_1, VIDEO_2, VIDEO_3
DDC_IN1, DDC_IN2
DDC_OUT1, DDC_OUT2
SYNC_IN1, SYNC_IN2
[GND - 0.5] to [V
CC_VIDEO
+ 0.5]
[GND - 0.5] to 6.0
[GND - 0.5] to 6.0
[GND - 0.5] to [V
CC_SYNC
+ 0.5]
V
V
V
V
Operating Temperature Range
-40 to +85
C
Storage Temperature Range
-40 to +150
C
Package Power Rating (T
A
=25C)
500
mW
2004 California Micro Devices Corp. All rights reserved.
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
08/12/04
CM2009
Specifications (cont'd)
Note 1: All parameters specified over standard operating conditions unless otherwise noted.
Note 2: These parameters apply only to the SYNC drivers. Note that R
OUT
= R
T
+ R
BUFFER
.
Note 3: Per the IEC-61000-4-2 International ESD Standard, Level 4 contact discharge method. BYP, V
CC_VIDEO
and V
CC_SYNC
must
be bypassed to GND via a low impedance ground plane with a 0.2
F, low inductance, chip ceramic capacitor at each supply
pin. ESD pulse is applied between the applicable pins and GND. ESD pulses can be positive or negative with respect to
GND. Applicable pins are: VIDEO_1, VIDEO_2, VIDEO_3, SYNC_OUT1, SYNC_OUT2, DDC_OUT1 and DDC_OUT2. All
other pins are ESD protected to the industry standard
2kV Human Body Model (MIL-STD-883, Method 3015). The bypass
capacitor at the BYP pin may optionally be omitted, in which case the max. ESD withstand voltage for the DDC_OUT1 and
DDC_OUT2 pins is reduced to
4kV.
Note 4: This parameter is guaranteed by design and characterization.
Note 5: The SYNC_OUT pins on the CM2009-02 are guaranteed for 2kV HBM ESD protection.
ELECTRICAL OPERATING CHARACTERISTICS
(SEE NOTE 1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX UNITS
I
CC_VIDEO
V
CC_VIDEO
Supply Current
V
CC_VIDEO
= 5.0V; VIDEO inputs at V
CC_VIDEO
or GND
10
A
I
CC_DDC
V
CC_DDC
Supply Current
V
CC_DDC
= 5.0V
10
A
I
CC_SYNC
V
CC_SYNC
Supply Current
V
CC_SYNC
= 5V; SYNC inputs at GND or V
CC_SYNC
;
SYNC outputs unloaded
50
A
V
CC_SYNC
= 5V; SYNC inputs at 3.0V;
SYNC outputs unloaded
2.0
mA
V
F
ESD Diode Forward Voltage
I
F
= 10mA
1.0
V
V
IH
Logic High Input Voltage
V
CC_SYNC
= 5.0V; Note 2
2.0
V
V
IL
Logic Low Input Voltage
V
CC_SYNC
= 5.0V; Note 2
0.6
V
V
OH
Logic High Output Voltage
I
OH
= 0mA, V
CC_SYNC
= 5.0V; Note 2
4.85
V
V
OL
Logic Low Output Voltage
I
OL
= 0mA, V
CC_SYNC
= 5.0V; Note 2
0.15
V
R
OUT
SYNC Driver Output Resistance
(CM2009-00 only)
V
CC_SYNC
= 5.0V; SYNC Inputs at GND or 3.0V
65
R
OUT
SYNC Driver Output Resistance
(CM2009-01 only)
V
CC_SYNC
= 5.0V; SYNC Inputs at GND or 3.0V
55
R
OUT
SYNC Driver Output Resistance
(CM2009-02 only)
V
CC_SYNC
= 5.0V; SYNC Inputs at GND or 3.0V;
Note 5
15
V
OH-02
Logic High Output Voltage
(CM2009-02 only)
I
OH
= 24mA; V
CC_SYNC
= 5.0V; Note 2
2.0
V
V
OL-02
Logic Low Output Voltage (CM2009-02 only) I
OL
= 24mA; V
CC_SYNC
= 5.0V; Note 2
0.8
V
I
IN
Input Current
VIDEO Inputs
V
CC_VIDEO
= 5.0V; V
IN
= V
CC_VIDEO
or GND
1
A
SYNC_IN1, SYNC_IN2 Inputs
V
CC_SYNC
= 5.0V; V
IN
= V
CC_SYNC
or GND
1
A
I
OFF
Level Shifting N-MOSFET "OFF" State
Leakage Current
(V
CC_DDC
- V
DDC_IN
)
0.4V; V
DDC_OUT
= V
CC_DDC
10
A
(V
CC_DDC
- V
DDC_OUT
)
0.4V; V
DDC_IN
= V
CC_DDC
10
A
V
ON
Voltage Drop Across Level-shifting
N-MOSFET when "ON"
V
CC_DDC
= 2.5V; V
S
= GND; I
DS
= 3mA;
0.18
V
C
IN_VID
VIDEO Input Capacitance
V
CC_VIDEO
= 5.0V; V
IN
= 2.5V;
= 1MHz; Note 4
4
pF
V
CC_VIDEO
= 2.5V; V
IN
= 1.25V;
= 1MHz; Note 4
4.5
pF
t
PLH
SYNC Driver L => H Propagation Delay
C
L
= 50pF; V
CC
= 5.0V; Input t
R
and t
F
5ns
12
ns
t
PHL
SYNC Driver H => L Propagation Delay
C
L
= 50pF; V
CC
= 5.0V; Input t
R
and t
F
5ns
12
ns
t
R,
t
F
SYNC Driver Output Rise & Fall Times
C
L
= 50pF; V
CC
= 5.0V; Input t
R
and t
F
5ns
4
ns
V
ESD
ESD Withstand Voltage
V
CC_VIDEO
= V
CC_SYNC
= 5V; Notes 3, 4 & 5
8
kV
2004 California Micro Devices Corp. All rights reserved.
08/12/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
5
CM2009
Application Information
Figure 1. Typical Application Connection Diagram
NOTES
1
The CM2009 should be placed as close to the VGA or DVI-I connector as possible.
2
The ESD protection channels VIDEO_1, VIDEO_2, VIDEO_3 may be used interchangeably between the R, G, B signals.
3
If differential video signal routing is used, the RED, BLUE, and GREEN signal lines should be terminated with external 37.5
resistors.
4
"VF" are external video filters for the RGB signals.
5
Supply bypass capacitors C1 and C2 must be placed immediately adjacent to the corresponding Vcc pins. Connections to
the Vcc pins and ground plane must be made with minimal length copper traces (preferably less than 5mm) for best ESD
protection.
6
The bypass capacitor for the BYP pin has been omitted in this diagram. This results in a reduction in the maximum ESD
withstand voltage at the DDC_OUT pins from
8kV to 4kV. If 8kV ESD protection is required, a 0.2F ceramic bypass
capacitor should be connected between BYP and ground.
7
The SYNC buffers may be used interchangeably between HSYNC and VSYNC.
8
The EMI filters at the SYNC_OUT and DDC_OUT pins (C5 to C12, and Ferrite Beads FB1 to FB4) are for reference only.
The component values and filter configuration may be changed to suit the application.
9
The DDC level shifters DDC_IN, DDC_OUT, may be used interchangeably between DDCA_CLK and DDCA_DATA.
10 R1, R2 are optional. They may be used, if required, to pull the DDC_CLK and DDC_DATA lines to VCC_5V when no moni-
tor is connected to the VGA connector. If used, it should be noted that "back current" may flow between the DDC pins and
VCC_5V via these resistors when VCC_5V is powered down.
11 For optimal ESD performance with the CM2009-02, an additional clamp device (such as the CMD PACDN042) should be
placed on HSYNC/VSYNC lines between the external matching resistor and the VGA connector.
DDC_OUT1
DDC_IN1
DDC_IN2
RED
Video Port
DDC_DATA
DDC_CLK
BLUE
GREEN
VCC_5V
VCCA_DAC
DDCA_CLK
DDCA_DATA
RED_VIDEO
GREEN_VIDEO
BLUE_VIDEO
CM2009
V
CC_SYNC
VIDEO_1
VIDEO_2
VIDEO_3
VF**
VF
*
*
VF**
FB4
** VIDEO Filters.
0.2uF
V
CC_VIDEO
C2
0.2uF
C1
100k
R1
100k
R2
C11
C12
FB3
C9
C10
FB2
C7
C8
FB1
C5
C6
Optional EMI Filters
75
See Note 4
75
75
SYNC_OUT2
SYNC_IN2
SYNC_OUT1
SYNC_IN1
DDC_OUT2
HSYNC
VSYNC
VSYNC_OUT
HSYNC_OUT
Connector
DIG_GND
SYNC_GND
RED_GND
GREEN_GND
BLUE_GND
V
CC_DDC
VCCGPIO
2004 California Micro Devices Corp. All rights reserved.
6
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
Tel: 408.263.3214
Fax: 408.263.7846
www.calmicro.com
08/12/04
CM2009
Mechanical Details
QSOP Mechanical Specifications
CM2009 devices are packaged in 16-pin QSOP pack-
ages. Dimensions are presented below.
For complete information on the QSOP-16 package,
see the California Micro Devices QSOP Package Infor-
mation document.
* This is an approximate number which may vary.
Package Dimensions for QSOP-16
PACKAGE DIMENSIONS
Package
QSOP (JEDEC name is SSOP)
Pins
16
Dimensions
Millimeters
Inches
Min
Max
Min
Max
A
1.35
1.75
0.053
0.069
A1
0.10
0.25
0.004
0.010
B
0.20
0.30
0.008
0.012
C
0.18
0.25
0.007
0.010
D
4.80
5.00
0.189
0.197
E
3.81
3.98
0.150
0.157
e
0.64 BSC
0.025 BSC
H
5.79
6.19
0.228
0.244
L
0.40
1.27
0.016
0.050
# per tube
100 pcs*
# per tape
and reel
2500 pcs
Controlling dimension: inches
Mechanical Package Diagrams
E
D
H
TOP VIEW
L
END VIEW
C
e
B
A
A1
SEATING
PLANE
SIDE VIEW
5
6
7
8
1
2
3
4
12
11
10
9
16
15
14
13
Pin 1 Marking
PDF 
ZIP