02/02/04

430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846

www.calmicro.com

CM3131

Triple Linear Voltage Regulator for DDR-I/-II Memory

Features

· Integrated power solution for DDR-I and DDR-II

memory systems with few external components

· Three all-linear regulators for V

DDQ

, V

and

STBY

power supply applications

· Lowest system cost and smallest footprint for

DDR power solutions

· V

DDQ

regulator/driver utilizes external N-FET to

provide up to 15A current at 2.5V/1.8V

· V

source/sink regulator provides up to 2A at

1.25V for DDR-I systems or 0.65A at 0.9V for
the DDR-II memory controller (not DDR-II
memory)

· LDO standby regulator provides up to 500mA at

2.5V for DDR-I and at 1.8V for DDR-II systems

· Can be ganged for higher current applications

· Over temperature and reverse current protection

· Over current protection for V

STBY

and V

regulator

· Available in 8 lead and 14 lead PSOP packages

· Lead-free

versions

available

Applications

· Desktop PCs, notebooks, and workstations

· Set top boxes, digital TVs, printers

· Embedded

systems

Product Description

The CM3131 family of all-linear regulators provides
an integrated power solution for DDR-I/-II memory
systems in both run-time and standby modes of
operation. The CM3131 is ideal for designs
incorporating both a main 3.3V and a standby (3.3V
or 5V) supply. The CM3131 features three
independent linear regulators for V

DDQ

, V

and V

STBY

supply regulation and will maintain an accuracy of
±1% across the operating temperature range.

The CM3131 is offered in two configurations. The
CM3131-01/11 drives a single external N-FET on a
single V

DDQ

rail. The CM3131-02 drives two external

unmatched N-FETs on two V

DDQ

rails. Each V

DDQ

rail

incorporates an adjustment pin (SENSE) to enable
setting V

DDQ

in the 2.2V to 2.8V range, supporting

DIMMs with different supply requirements or DDR-II
type devices.

The CM3131-01/11 is available in 8-lead PSOP
package and the CM3131-02 is available in 14-lead
PSOP package.

The CM3131 devices are also available with optional
lead-free finishing.

Electrical Schematic

02/02/04

430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846

www.calmicro.com

CM3131

PACKAGE / PINOUT DIAGRAM

Note: These drawings are not to scale.

PIN DESCRIPTIONS

PART NUMBER

-01

-11

-02

NAME

DESCRIPTION

1 1 13

DDQ

/ V

DDQ1

DDQ

input for V

REF

and V

DDQ

Output in Standby

2 2 14

Output for termination resistors

connection

3 3 2

GND

Ground

SEL

Select Input, active low

connection

Enable Input, active high

SENSE / SENSE1

Sense Input, Adjusts V

DDQ

Rail

6 6 6

3.3V Main Input Supply

7 7 8

STBY

3.3V or 5V Standby Input Supply

DRIVE / DRIVE1

Drive Output for V

DDQ

External n-FET

DRIVE2

Drive Output for V

DDQ

External n-FET

SENSE2

Sense Input, Adjusts V

DDQ

Rail

DDQ 2

DDQ

Input for V

REF

and V

DDQ

Output in Standby

Ordering Information

PART NUMBERING INFORMATION

STANDARD FINISH

LEAD-FREE FINISH

PINS

PACKAGE

ORDERING PART
NUMBER

PART
MARKETING

ORDERING
PART NUMBER

PART
MARKING

8 PSOP-8 CM3131-01SB CM3131-01SB

CM3131-01SH

8 PSOP-8 CM3131-11SB CM3131-11SB

CM3131-11SH

14 PSOP-14 CM3131-02SB CM3131-02SB CM3131-02SH CM3131-02SH

Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.

DDQ

GND

SEL/EN

DRIVE

STBY

SENSE

CM3131-01/11

PSOP-8

TOP VIEW

PSOP-14

DDQ1

DDQ2

SENSE2

DRIVE2

DRIVE1

STBY

CM3131-02

TOP VIEW

GND

SEL

SENSE1

02/02/04

430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846

www.calmicro.com

CM3131

Functional Description

The CM3131-01 / -11 and CM3131-02 provide
power for DDR-I/DDR-II memories from three
voltage regulators on-chip with either one or two
external N-FETs respectively. There is an over-
temperature thermal shutdown if any of the
regulators overheat. Each regulator has reverse
current protection in the event of any being shut
down.

The linear regulator-driver/s with external N-FET/s
can provide up to 15A at 2.5V/1.8V for the V

DDQ

DDR-I/-II memory, from an input supply voltage of
2.8V-3.6V. An external feedback resistor divider,
connected to the SENSE1 pin, enables selection of
V

DDQ

output voltages from 2.2V to 2.8V for use with

DDR-I memories requiring other than 2.5V for V

DDQ

= 1.25V x (R1+R2)/R2. When SENSE1 is

connected to GND or left open, V

DDQ

is fixed at

2.50V (and VTT at 1.25V). For DDR-II operation,
V

DDQ

can be set from 1.7V to 1.9V.

The V

regulator is a linear source-sink regulator

powered from the V

DDQ

output that supplies the V

supply required by DDR-I memory termination
resistors. This regulator sinks or sources up to 2A at

1.25V to or from the DDR-I bus termination resistors.
For DDR-II applications, the regulator sinks or
sources 0.65A at 0.9V. The V

output voltage

accurately tracks V

DDQ

/2 to 1%. When there is no

provided, V

is powered down and its output is

0V. This regulator has overload current limiting of
2.5A.

The standby regulator is a LDO regulator that is
powered from a standby voltage, V

STBY

, of 3.3V or

5V, and supplies a regulated output of up to 500mA
to the V

DDQ

of the DDR memory to enable it to retain

its contents during the standby mode. It provides
2.5V for DDR-I and 1.8V for DDR-II.

The CM3131-01 and CM3131-11 differ with regards
the selection of truth table for determining which S0-
S5 sequencing matrix the chip is set for. The
CM3131-02 has both EN and SEL pins to more
accurately define each Sx stage without monitoring
the V

or V

STBY

voltages.

Two CM3131s can be ganged together to provide
V

DDQ

power to dual channels of DDR memory, and

the memory controller chip of any chip set.

Linear

Source-Sink

Reg

DDQ

LDO Drive

SEL / EN

SBY

DDQ

STBY

/ 3.3V

STBY

GND

2.8V / 3.0V / 3.3V for DDR-I,

2.2V /2.5V / 3.3V for DDR-II

DRIVE

SENSE

DDQ

LDO

DDQ

/ V

Control

DDQ

FET

Only needed for
DDR-I if V

DDQ

not 2.5V, e.g. 2.6V
or 2.7V.
Set to 1.7V to
1.9V for DDR-II

PSOP-8

Internal V

SBY

voltage

doubler ensures V

> 5.3V

Drives any N-FET with C

<1200pF

Linear

Source-Sink

Reg

DDQ

DDQ1

DDQ

LDO Drives

SBY

DDQ2

STBY

/ 3.3V

STBY

GND

DRIVE1

DDQ1

DRIVE2

DDQ2

SENSE1

SENSE2

DDQ1

DDQ2

DDQ

LDOs

DDQ

/ V

Control

SEL

GND

N-FET1

N-FET2

2.8V / 3.0V / 3.3V for DDR-I,

2.2V /2.5V / 3.3V for DDR-II

CM3131-02

Examples of Single and Dual N-FET Drive Configurations

CM3131-01/11

02/02/04

430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846

www.calmicro.com

CM3131

Functional Description (cont'd)

STBY

SEL

DDQ 1,2

3V/3.3V 5V/3.3V

DDQ

/ 2

X 5V/3.3V

OFF

DDQ STBY

CC MIN

X ON 0V 0V

X <V

STBY MIN

OFF 0V 0V

Truth Table for CM3131-01

S to R

STBY

SEL

DDQ OUT

TT OUT

S0 3V/3.3V

5V/3.3V ON V

DDQ

/ 2

S1 3V/3.3V

5V/3.3V ON V

DDQ

/ 2

S2 3V/3.3V

5V/3.3V ON V

DDQ

/ 2

S3 3V/3.3V

5V/3.3V OFF

DDQ STBY

S4 <V

CC MIN

5V/3.3V OFF

S5 <V

CC MIN

5V/3.3V OFF

Sequencing Matrix for CM3131-01 for Suspend to RAM operation

No S to R V

STBY

SEL

DDQ OUT

TT OUT

S0 3V/3.3V

5V/3.3V ON V

DDQ

/ 2

S1 3V/3.3V

5V/3.3V ON V

DDQ

/ 2

S2 3V/3.3V

5V/3.3V ON V

DDQ

/ 2

S3 <V

CC MIN

5V/3.3V ON

S4 <V

CC MIN

5V/3.3V ON

S5 <V

CC MIN

5V/3.3V ON

Sequencing Matrix for CM3131-01 for Suspend to RAM Not Supported

STBY

DDQ OUT

TT OUT

3V/3.3V 5V/3.3V

DDQ

/ 2

CC MIN

5V/3.3V ON V

DDQ STBY

CC MIN

X OFF 0V 0V

X <V

STBY MIN

OFF 0V 0V

Truth Table for CM3131-11

02/02/04

430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846

www.calmicro.com

CM3131

Functional Description (cont'd)

S to R

STBY

DDQ OUT

TT OUT

S0 3V/3.3V

5V/3.3V ON V

DDQ

/ 2

S1 3V/3.3V

5V/3.3V ON V

DDQ

/ 2

S2 3V/3.3V

5V/3.3V ON V

DDQ

/ 2

S3 <V

CC MIN

5V/3.3V ON V

DDQ STBY

S4 <V

CC MIN

5V/3.3V OFF

S5 <V

CC MIN

5V/3.3V OFF

Sequencing Matrix for CM3131-11 for Suspend to RAM operation

STBY

SEL

DDQ OUT

TT OUT

3V/3.3V 5V/3.3V

DDQ

/ 2

CC MIN

5V/3.3V OFF

ON V

DDQ STBY

X <V

STBY MIN

OFF ON 0V 0V

0V X ON

ON 0V 0V

CC MIN

X X

OFF

Truth Table for CM3131-02

Table 3

STBY

SEL

DDQ OUT

TT OUT

S0 3V/3.3V

5V/3.3V ON ON V

DDQ

/ 2

S1 3V/3.3V

5V/3.3V ON ON V

DDQ

/ 2

S2 3V/3.3V

5V/3.3V ON ON V

DDQ

/ 2

S3 <V

CC MIN

5V/3.3V OFF

ON V

DDQ STBY

S4 <V

CC MIN

X ON

OFF

0V 0V

S5 <V

CC MIN

X ON

OFF

0V 0V

Sequencing Matrix for CM3131-02 for Suspend to RAM operation

02/02/04

430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846

www.calmicro.com

CM3131

Specifications

ABSOLUTE MAXIMUM RATINGS

PARAMETER

RATING

UNITS

ESD (Human Body Model)

± 2000

, V

STBY

, DRIVEx

(GND 0.6) to (+6.5)

SEL, SENSEx

(GND 0.6) to (V

+ 0.6)

DDQX

, V

(GND 0.6) to (V

+ 0.6)

Operating Temperature Range

Ambient

0 to +70

°C

Junction

0 to +125

°C

Storage Temperature Range

-40 to +150

°C

STANDARD OPERATING CONDITIONS

PARAMETER

RATING

UNITS

Temperature Range (Ambient)

0 to +70

°C

1. V

DDQ

Regulator-Driver

Supply Voltage V

2.8 to 3.6

Load Current

0 to 15

, C

DDQ

4.7, 220

µF

2. V

Regulator

Supply Voltage V

DDQ

1.8 or 2.5

Load Current

0 to +/- 0.9 or +/- 2.0

220

µF

3, V

STBY

Regulator

Supply Voltage V

STBY

3.0

5.5

Load Current

0 to 500

02/02/04

430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846

www.calmicro.com

CM3131

Specifications (cont'd)

ELECTRICAL OPERATING CHARACTERISTICS

(SEE NOTE 1)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

General Parameters

OVER

Shutdown

Junction

Temperature

150

°C

DDQ

Regulator/Driver Parameters (with FDP6030L or similar MOSFET as an external transistor)

CC MIN

Input

Voltage

DDQ

= 2.5V, I

DDQ

= 6A,

each channel, SENSE = 0V

2.80

DDQ

Output Voltage Range

DDQ

= 2.5A, V

= 3.3V,

SENSE = 0V

2.45 2.50 2.55

DRIVE H 5

DRIVE

High

Output

Voltage

STBY

= 5V, V

= 3.3V

9.50

DRIVE H 3

DRIVE

High

Output

Voltage

STBY

= 3.3V, V

= 3.3V

6.1

LOAD

External

FET

Gate

Capacitance

STBY

= 5V, V

= 3.3V

1200

RISE

DRIVE Voltage Rise
Time

STBY

= 5V, V

= 3.3V,

LOAD

= 1200pF

2.5

DDQ LOAD

Load Regulation @
25

°C

= 3.3V, I

DDQ

= 0.1A to 6A

each channel

-1.0 - 1.0 %

DDQ LINE

Line Regulation @ 25

°C

DDQ

= 2.5A, V

= 2.8V to

3.6V

-1.0 - 1.0 %

Regulator Parameters

Output Voltage Range

DDQ

= 2.50V, I

= 0A

1.20

1.25

1.30

TT LOAD

Load Regulation @ 25C

= 0.1A to 2A, V

DDQ

= 2.5V

-1.0

1.0

TT LINE

Line Regulation @ 25C

= 0A, V

= 2.8V to 3.6V

-1.0

1.0

TT LIM

Current

Limit

2.3 A

TT SC

Short Circuit Current
Limit

< 1V

0.6

STBY

Regulator Parameters

DDQ STBY

Output Voltage Range

DDQ

=150mA, V

STBY

= 5V,

SENSE =0V

2.45 2.50 2.55

DDQSB LD

Load Regulation @ 25C

DDQ

= 10mA to 500mA,

STBY

= 5V

-1.0 - 1.0 %

DDQ SBLN

Line Regulation @ 25C

DDQ

= 150mA,

STBY

= 3.0V to 5.5V

-1.0 - 1.0 %

DROPOUT

Dropout

Voltage

DDQ

= 250mA, each channel

250

450 mV

STBY LIM

Overload Current Limit

400 mA

STBY SC

Short Circuit Current
Limit

DDQ

< 1V

170 mA

Note 1: All parameters specified at T

= 0

C to +70

C unless otherwise noted.

02/02/04

430 N. McCarthy Blvd., Milpitas, CA 95035-5112 Tel: 408.263.3214 Fax: 408.263.7846

www.calmicro.com

CM3131

Specifications (cont'd)

ELECTRICAL OPERATING CHARACTERISTICS (Cont'd)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

All Regulators

CCN

Normal Mode V

Supply Current

Normal mode (S0-S2)
(V

DDQ1,2

DDQ

/2)

µA

STBYN

Normal Mode V

STBY

Supply Current

Normal mode (S0-S2)
(V

DDQ1,2

DDQ

/2)

1650

2450

µA

STBYS

Standby Mode V

STBY

Supply Current

Standby mode (S3)
(V

DDQ1,2

DDQSTBY

=0)

550

850

µA

STBYQ

Shutdown

Mode

Quiescent Current

Shutdown mode (S4-S5)

DDQ1,2

=0)

120

µA

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ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: CM3131-02SH