CALIFORNIA MICRO DEVICES
2000 California Micro Devices Corp. All rights reserved.
11/19/2000
1
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
PACDT
P/Active 1% Tolerance Dual Thvenin Termination Network
Features
Minimal ground bounce, crosstalk
Stable 1% absolute tolerance elements
16 terminating lines per QSOP package
Saves board space and reduces assembly cost
Product Description
High speed logic devices like HSTL (High Speed
Transceiver Logic) demand unique, high speed bus
terminations. The dual Thvenin termination network
provides 16 terminating channels per package, and
optimizes signal integrity by reducing reflections and
ringing. The terminations are available in a range of
standard values and are ideal for use in HSTL busses.
As seen in the schematic, R1 is typically tied to V
CC
and
serves as a pull-up resistor, while R2 functions as a pull-
down resistor and is tied to ground (or the most negative
supply voltage). In addition, the equivalent Thvenin
Applications
HSTL termination
Thvenin termination
ECL, TTL termination
C1611100
resistance (R1 in parallel with R2) should match the
impedance of the trace. Ground-bounce and crosstalk
are virtually eliminated using a proprietary lead-frame
which includes four direct ground connections to the die
substrate, as well as four double-bonded connections to
V
CC
, for a total of 8 commons. In addition, the resistors
are trimmed to a tight absolute tolerance of 1% which
provides tight impedance-matching and results in greatly
reduced reflections. This unique proprietary design
provides optimal signal integrity.
SCHEMATIC CONFIGURATION
V
CC
24
1
2
3
4
23
22
21
17
20
19
18
16
15
14
13
6
5
7
8
9
11
10
12
GND
47
94
94
001
50
100
100
002
56
112
112
003
68
136
136
004
CODE
R2 (
)
R1(
)
BUS IMPEDANCE (
)
STANDARD PART ORDERING INFORMATION
Package
Ordering Part Number
R
Code
Pin
Style
Tubes
Tape & Reel
Part Marking
001
24
QSOP
PAC001DTFQ/T PAC001DTFQ/R
PAC001DTFQ
002
24
QSOP
PAC002DTFQ/T PAC002DTFQ/R
PAC002DTFQ
003
24
QSOP
PAC003DTFQ/T PAC003DTFQ/R
PAC003DTFQ
004
24
QSOP
PAC004DTFQ/T
PAC004DTFQ/R
PAC004DTFQ
STANDARD VALUES
Absolute Tolerance (R1 & R2)
1%
TCR
100ppm
Operating Temperature Range
0
C to 70
C
Power Rating/Resistor
100mW
Crosstalk (see Test Circuit)
30mV TYP
Package
24 Pin QSOP
CALIFORNIA MICRO DEVICES
2000 California Micro Devices Corp. All rights reserved.
11/19/2000
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
2
PACDT
Degrees C
Percent of
Rated Power
0
0
70
125 150
20
40
60
80
100
L
C
D
E
H
H
1
B
e
A
A
1
POWER DERATING CURVE
MECHANICAL SPECIFICATIONS
Lead Plating
Tin-Lead
Lead Material
Copper Alloy
Lead Coplanarity
0.004" (0.102mm)
Substrate Material
Silicon
Body Material
Molded Epoxy
Flammability
UL94V-0
PACKAGE DIMENSIONS, POWER DISSIPATION & ORDERING INFORMATION
Package
QSOP
Pins #
16
20
24
28
mm inches mm inches mm inches mm inches
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
1.35 1.75 0.053 0.069 1.35 1.75 0.053 0.069 1.35 1.75 0.053 0.069 1.35 1.75 0.053
0.069
0.10 0.25 0.004 0.010 0.10 0.25 0.004 0.010 0.10 0.25 0.004 0.010 0.10 1.25 0.004
0.010
0.20 0.30 0.008 0.012 0.20 0.30 0.008 0.012 0.20 0.30 0.008 0.012 0.20 0.30 0.008
0.012
0.18 0.25 0.007 0.010 0.18 0.25 0.007 0.010 0.18 0.25 0.007 0.010 0.18 0.25 0.007
0.010
4.80 5.00 0.189 0.197 8.56 8.73 0.337 0.344 8.56 8.73 0.337 0.244 9.80 9.98 0.386
0.393
3.81 3.98 0.150 0.157 2.81 3.98 0.150 0.157 3.81 3.98 0.150 0.157 3.81 3.98 0.150
0.157
.64 BSC
0.025 BSC
.64 BSC
0.025 BSC
.64 BSC
0.025BSC
0.64 BSC
0.025 BSC
5.79 6.19 0.228 0.244 5.79 6.19 0.228 0.244 5.79 6.19 0.228 0.244 5.79 6.20 0.228
0.244
0.40 1.27 0.016 0.050 0.40 1.27 0.016 0.050 0.40 1.27 0.016 0.050 0.40 1.27 0.016
0.050
P
D
@ 70
C 0.75W 1.00W 1.00W 1.00W
#/tube
99 pcs
56 pcs
56 pcs
56 pcs
#/tape & reel
2,500 pcs
2,500 pcs
2,500 pcs
2,500 pcs
A
A
1
B
C
D
E
e
H
L
PDF 
ZIP