2000 California Micro Devices Corp. All rights reserved.
8/10/2000
1
CALIFORNIA MICRO DEVICES
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
PACRG
P/Active
High Performance GTL/ECL Local Termination Network
Features
Designed especially for Pentium Pro and RISC-
based computers/servers
Provides high speed bus termination
Reduces ground bounce with center ground
pin placement
Terminates 22 lines in a QSOP package
Saves board space and reduces assembly cost
Product Description
CAMD's P/Active RG GTL+ Local Bus Terminator is ideal
for Pentium Pro and related high speed bus termination
applications where a resistor approach is deemed suitable.
This device also meets the high-speed bus termination
demands of microprocessors like Motorola's PowerPC,
DEC's Alpha, Sun's SPARC, and SGI's MIPs processor, as
well as other high performance RISC processors for
embedded control applications.
The PACRG offers 22 terminations per package and meets
all related Intel specifications for Pentium Pro termination
requirements. Four popular values are available for a
variety of bus termination applications and line impedance
requirements: 47, 50, 56 and 68 ohms.
Applications
Pentium Pro servers
Pentium Pro desk top systems
GTL, ECL terminator for embedded
processor busses
PIN DIAGRAM
+'"
Refer to AP-201 Termination Application Note and AP-203 GTL+
Termination Application Note for further information.
The P/Active RG Termination Networks provide high
performance, high reliability, and low cost through manu-
facturing efficiency. The termination resistor elements are
fabricated using proprietary state-of-the-art thin film
technology. CAMD's highly integrated solution is silicon-
based and has the same enhanced reliability characteris-
tics as today's microprocessor products. The thin film
resistors have very high stability over a wide temperature
range, over applied voltage, and over life. In addition, the
QSOP industry standard packaging is manufacturing-
friendly and yields the high reliability of other semiconduc-
tor components. The P/Active RG Pentium Pro Termination
Network provides a complete 300 point termination
solution in only 14 QSOP packages.
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2000 California Micro Devices Corp. All rights reserved.
8/10/2000
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
2
CALIFORNIA MICRO DEVICES
PACRG
Signal at Termination and Victim Line (TA=25
O
C) (See Test Circuit)
Channel 1 (500mV/division) Termination Signal, Channel 2 (250mV/division) Victim Voltage. The victim voltage
crosstalk measures 65mV in the critical areas around the system clock. The system clock occurs approximately 4ns
before each data transition. The horizontal dashed lines are 65mV apart. The time scale is 5.0ns/division. The signal
voltage rise and fall times have been adjusted at the driver to conform to Intel specifications.) Measurements made
using Tektronix TDS820 6 GHz Digitizing Oscilloscope with P6207 FET Probes.
Cha
500mV/De
Cha
250mV/De
Test Circuit Block Diagram
2000 California Micro Devices Corp. All rights reserved.
8/10/2000
3
CALIFORNIA MICRO DEVICES
215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com
PACRG
Test Circuit
VCC_1.5
R
1
R
2
R
3
R
4
R
5
G
6
R
7
R
8
R
9
R
10
R
11
R
12
R
13
R
14
R
15
R
16
R
17
R
18
G
19
R
20
R
21
R
22
R
23
R
24
U3
PRN331A
C22
1000pF
C23
0.1uF
TP5
PB5
VICTIM
VTT
GTL2
GTL2
GTL3
GTL3
GTL4
GTL4
GTL5
GTL7
GTL8
GTL8
GTL9
GTL9
GTL11
GTL11
GTL10
GTL10
GTL1
GND
R2
56
C18
1000pF
C19
0.1uF
C20
1000pF
C21
0.1uF
VTT
VCC_1.5
GND
R1
56
C15
1000pF
C16
0.1uF
C17
0.1uF
GTL1
GTL2
GTL3
GTL4
GTL5
GTL6
GTL8
GTL7
VCC_5
VCC_1.5
GND
GND
GND
/OEAB
1
LEAB
2
A1
3
A2
5
A3
6
VCC_3
7
A4
8
A5
9
A6
10
A7
12
A8
13
A9
14
A10
15
A11
16
A12
17
A13
19
A14
20
A15
21
VCC_3
22
A16
23
A17
24
CLKIN
26
/OEBA
27
LEBA
28
/CEBA
29
CLKBA
30
CLKOUT
31
B17
33
B16
34
VREF
35
B15
36
B14
37
B13
38
B12
40
B11
41
B10
42
B9
43
B8
44
B7
45
B6
47
B5
48
B4
49
B3
51
B2
52
B1
54
CLKAB
55
/CEAB
56
U1
74GTL16616
C8
0.1uF
C9
0.1uF
VCC_3
GND
GND
GND
GATE1
GATE2
GATE3
GND
GND
GND
1A1
2
1A2
4
1A3
6
1A4
8
2A1
11
2A2
13
2A3
15
2A4
17
1G
1
2G
19
1Y1
18
1Y2
16
1Y3
14
1Y4
12
2Y1
9
2Y2
7
2Y3
5
2Y4
3
U2
74FCT244
GATE1
GATE2
GATE3
GATE4
BUFFER1
VCC_5
W1
SMA
RIN1
100
RIN2
100
TP1
PB1
TP1
BUFFER1
GND
GND
GND
PULSE_GEN
GND
GND
TP4
PB4
TP4
GND
C10
0.1uF
C11
0.1uF
VCC_3
GND
GND
GATE4
GND
VCC_5
GND
GND
VCC_3
C12
0.1uF
C13
1000pF
C14
0.1uF
VREF
GTL9
GTL11
GTL10
GTL_TEST
VICTIM
GND
VCC_5
GND
GND
R3
1K
R4
2K
C24
1000pF
C25
0.1uF
VREF
VCC_1.5
GND
TP3
PB3
TP3
GTL5
GTL6
GTL6
GTL7
GND
GND
GND
GND
1
2
3
4
5
6
7
8
JP1
POWER
VCC_5
VCC_3
VCC_1.5
GND
GND
GND
GND
GND
GND
VCC_1.5
VCC_3
VCC_5
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