Central

Semiconductor Corp.

145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com

PROCESS

CP324

Small Signal MOSFET Transistor

N- Channel Enhancement-Mode Transistor Chip

PRINCIPAL DEVICE TYPES

2N7002

GEOMETRY

PROCESS DETAILS

BACKSIDE DRAIN

R1 (1-August 2002)

Process

EPITAXIAL PLANAR

Die Size

21.65 x 21.65 MILS

Die Thickness

9.0 MILS

Gate Bonding Pad Area

5.5 x 5.5 MILS

Source Bonding Pad Area

5.9 x 13.8 MILS

Top Side Metalization

Al - 30,000�

Back Side Metalization

Au - 12,000�

GROSS DIE PER 5 INCH WAFER