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Электронный компонент: CED4060A

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60
N-Channel Enhancement Mode Field Effect Transistor
March 1998
FEATURES
60V , 15A , R
DS(ON)
=85m
@V
GS
=10V.
Super high dense cell design for extremely low R
DS(ON)
.
High power and current handling capability.
TO-251 & TO-252 package.
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
V
DS
V
Gate-Source Voltage
V
GS
20
V
Drain Current-Continuous
-Pulsed
I
D
15
A
I
DM
45
A
Drain-Source Diode Forward Current
I
S
15
A
Maximum Power Dissipation
P
D
W
Operating and Storage Temperature Range
T
J
, T
STG
-55 to 175
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
R
JC
R
JA
3
50
/W
C
/W
C
CED4060A/CEU4060A
@Tc=25 C
Derate above 25 C
50
0.3
W/ C
S
G
D
CEU SERIES
TO-252AA(D-PAK)
CED SERIES
TO-251(l-PAK)
G
G
S
S
D
D
6
6-17
CED4060A/CEU4060A
ELECTRICAL CHARACTERISTICS (T
C
=25 C unless otherwise noted)
Parameter
Symbol
Condition
Min Typ Max Unit
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
BV
DSS
V
GS
= 0V, I
D
=250
A
60
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
=60V, V
GS
=0V
25
A
Gate-Body Leakage
I
GSS
V
GS
= 20V, V
DS
=0V
100 nA
ON CHARACTERISTICS
a
Gate Threshold Voltage
V
GS(th)
V
DS
=V
GS
, I
D
=250
A
2
2.7
4
V
Drain-Source On-State Resistance
R
DS(ON)
V
GS
=10V, I
D
=7.5A
85
m
On-State Drain Current
I
D(ON)
V
GS
=10V, V
DS
=10V
15
A
6
S
Forward Transconductance
FS
g
V
DS
=10V, I
D
= 7.5A
DYNAMIC CHARACTERISTICS
b
Input Capacitance
C
ISS
C
RSS
C
OSS
Output Capacitance
Reverse Transfer Capacitance
V
DS
=25V, V
GS
= 0V
f =1.0MH
Z
335
P
F
150
P
F
P
F
40
SWITCHING CHARACTERISTICS
b
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
t
D(ON)
t
r
t
D(OFF)
t
f
Fall time
V
DD
=30V,
I
D
= 15A,
V
GS
= 10V,
R
GEN
= 25
20
ns
ns
ns
ns
100
30
50
10
65
15
30
10
4
2.4
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Q
g
Q
gs
Q
gd
V
DS
= 48V, I
D
=15A,
V
GS
= 10V
13
nC
nC
nC
6-18
6
68
Parameter
Symbol
Condition
Min Typ Max Unit
ELECTRICAL CHARACTERISTICS (T
C
=25 C unless otherwise noted)
DRAIN-SOURCE DIODE CHARACTERISTICS
Diode Forward Voltage
V
SD
V
GS
= 0V, Is = 7.5A
1.2
0.8
V
a
Notes
b.Guaranteed by design, not subject to production testing.
a.Pulse Test:Pulse Width 300 s, Duty Cycle 2%.
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
Figure 4. On-Resistance Variation with
Drain Current and Temperature
Figure 3. Capacitance
V
DS
, Drain-to Source Voltage (V)
V
GS
, Gate-to-Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
I
D
, Drain Current(A)
C
,
Capacitance
(pF)
Dr
ain-Source
,
O
n-Resistance
I
D
,
D
r
a
in
Current
(A)
I
D
,
D
r
a
in
Current
(A)
6-19
R
DS(ON)
,
N
or
maliz
e
d
CED4060A/CEU4060A
25 C
-55 C
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0
5
10
15
20
25
30
V
GS
=10V
Tj=125 C
6
30
25
20
15
10
5
0
0
1
2
3
4
5
6
V
GS
=10,9,8,7,V
V
GS
=6V
-55 C
25 C
125 C
20
15
10
5
0
0
1
2
3
4
5
Ciss
Coss
Crss
700
600
500
400
300
200
100
0
0
10
20
30
40
50
CED4060A/CEU4060A
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Breakdown Voltage Variation
with Temperature
Vth,
Normalized
Gate-Source
Threshold
Voltage
g
FS
,
Transconductance
(S)
V
GS
,
Gate
t
o
Source
Voltage
(V)
BV
DSS
,
Normalized
Drain-Source
Breakdown
Voltage
Is,
Source-drain
c
urrent
(A)
Figure 7. Transconductance Variation
with Drain Current
I
DS
, Drain-Source Current (A)
Figure 9. Gate Charge
Qg, Total Gate Charge (nC)
Figure 10. Maximum Safe
Operating Area
V
DS
, Drain-Source Voltage (V)
Figure 8. Body Diode Forward Voltage
Variation with Source Current
V
SD
, Body Diode Forward Voltage (V)
Tj, Junction Temperature ( C)
Tj, Junction Temperature ( C)
I
D
,
D
rain
Current
(A)
6-20
6
1.09
1.06
1.03
1.00
0.97
0.94
0.91
0.88
-50 -25
0
25
50
75
100 125 150
V
DS
=V
GS
I
D
=250 A
2
4
6
8
10
0
0
2
4
8
6
10
V
DS
=10V
20.0
10.0
0.1
1
0.4
0.6
0.8
1.0
1.2
V
GS
=0V
70
10
1
0.5
1
10
60 100
V
GS
=10V
Single Pulse
Tc=25 C
R
DS
(ON
) L
im
it
DC
1m
s
10
m
s
100
s
10
s
15
12
9
6
3
0
0
2
4
6
8
10
12
14
16
V
DS
=48V
I
D
=15A
-50
-25
0
25
50
75 100 125 150
1.06
1.04
1.02
1.00
0.98
0.96
0.94
ID=250 A
Figure 11. Switching Test Circuit
Figure 12. Switching Waveforms
t
V
V
t
t
d(on)
OUT
IN
on
r
10%
t
d(off)
90%
10%
10%
50%
50%
90%
t
off
t
f
90%
PULSE WIDTH
Transient
Thermal
Impedance
Square Wave Pulse Duration (sec)
Figure 13. Normalized Thermal Transient Impedance Curve
r(t),Normalized
Effective
6-21
6
CED4060A/CEU4060A
INVERTED
2
1
0.1
0.01
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
D=0.5
0.2
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
1. R
JA
(t)=r (t) * R
JA
2. R
JA
=See Datasheet
3. T
JM-
T
A
= P
DM
* R
JA
(t)
4. Duty Cycle, D=t
1
/t
2
SINGLE PULSE
V
DD
R
D
V
V
R
S
V
G
GS
IN
GEN
OUT
L