30
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
30V , 40A , R
DS(ON)
=19m
@V
GS
=10V.
Super high dense cell design for extremely low R
DS(ON)
.
High power and current handling capability.
TO-251 & TO-252 package.
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
V
DS
V
Gate-Source Voltage
V
GS
20
V
-Pulsed
I
D
40
A
I
DM
120
A
Drain-Source Diode Forward Current
I
S
40
A
Maximum Power Dissipation
P
D
W
Operating and Storage Temperature Range
T
J
, T
STG
-65 to 175
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
R
JC
R
JA
3
50
/W
C
/W
C
R
DS(ON)
=32m
@V
GS
=4.5V.
CED703AL/CEU703AL
@Tc=25 C
Derate above 25 C
50
0.3
W/ C
Drain Current-Continuous @T
J
=125 C
a
a
a
S
G
D
6
Jun. 2002
CEU SERIES
TO-252AA(D-PAK)
CED SERIES
TO-251(l-PAK)
G
G
S
S
D
D
6-47
CED703AL/CEU703AL
ELECTRICAL CHARACTERISTICS (T
C
=25 C unless otherwise noted)
Parameter
Symbol
Condition
Min Typ Max Unit
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
BV
DSS
=
V
GS
0V, I
D
250
A
=
30
V
Zero Gate Voltage Drain Current
I
DSS
V
DS
24V, V
GS
0V
=
=
1
A
Gate-Body Leakage
I
GSS
V
GS
20V, V
DS
= 0V
=
100
nA
ON CHARACTERISTICS
a
Gate Threshold Voltage
V
GS(th)
V
DS
= V
GS
, I
D
= 250
A
=
=
1
3
V
Drain-Source On-State Resistance
R
DS(ON)
V
GS
10V, I
D
= 25A
15
19
m
V
GS
4.5V, I
D
= 10A
23
32
m
On-State Drain Current
I
D(ON)
V
GS
= 10V, V
DS
= 10V
60
30
A
S
Forward Transconductance
FS
g
V
DS
= 10V, I
D
= 25A
DYNAMIC CHARACTERISTICS
b
Input Capacitance
C
ISS
C
RSS
C
OSS
Output Capacitance
Reverse Transfer Capacitance
V
DS
=15V, V
GS
= 0V
f =1.0MH
Z
1000
P
F
420
P
F
P
F
100
SWITCHING CHARACTERISTICS
b
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
t
D(ON)
t
r
t
D(OFF)
t
f
V
DD
= 15V,
I
D
=25A,
V
GS
= 10V,
R
GEN
=24
18
23
ns
ns
ns
ns
120
180
80
120
60
165
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Q
g
Q
gs
Q
gd
V
DS
=10V, I
D
= 25A,
V
GS
=5V
15
20
nC
nC
nC
4
6
Fall Time
6
6-48
CED703AL/CEU703AL
Parameter
Symbol
Condition
Min Typ Max Unit
ELECTRICAL CHARACTERISTICS (T
C
=25 C unless otherwise noted)
DRAIN-SOURCE DIODE CHARACTERISTICS
Diode Forward Voltage
V
SD
V
GS
= 0V, Is =25A
0.93
1.3
V
b
Notes
b.Guaranteed by design, not subject to production testing.
a.Pulse Test:Pulse Width 300 s, Duty Cycle 2%.
25 C
-55 C
3.0
2.5
2.0
1.5
1.0
0.5
0
0
10
20
30
40
Tj=125 C
V
GS
=10V
Figure 1. Output Characteristics
Figure 4. On-Resistance Variation with
Drain Current and Temperature
Figure 3. Capacitance
V
DS
, Drain-to Source Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
I
D
, Drain Current(A)
I
D
,
D
r
ain
Current(A)
C
,
Capacitance
(pF)
Dr
ain-Source
On-Resistance
Figure 2. Transfer Characteristics
V
GS
, Gate-to-Source Voltage (V)
I
D
,
D
r
ain
Current
(A)
R
DS(ON)
,
Nor
maliz
ed
6
6-49
-55 C
40
30
20
10
0
0
1
2
3
5
4
6
25 C
T
J
=125 C
40
35
30
25
20
15
10
5
0
0
0.5
1.0
1.5
2.0
2.5
3.0
V
GS
=10,8,7,6,5V
V
GS
=4V
V
GS
=3V
Ciss
Coss
Crss
3000
2500
2000
1500
1000
500
0
0
10
5
15
20
25
30
CED703AL/CEU703AL
with Temperature
Figure 6. Breakdown Voltage Variation
Figure 5. Gate Threshold Variation
with Temperature
Vth,
Normalized
Gate-Source
Threshold
Voltage
g
FS
,
Transconductance
(S)
V
GS
,
Gate
t
o
Source
Voltage
(V)
BV
DSS
,
Normalized
Drain-Source
Breakdown
Voltage
Is,
Source-drain
c
urrent
(A)
Figure 7. Transconductance Variation
with Drain Current
I
DS
, Drain-Source Current (A)
Figure 9. Gate Charge
Qg, Total Gate Charge (nC)
Figure 10. Maximum Safe
Operating Area
V
DS
, Drain-Source Voltage (V)
Figure 8. Body Diode Forward Voltage
Variation with Source Current
V
SD
, Body Diode Forward Voltage (V)
Tj, Junction Temperature ( C)
Tj, Junction Temperature ( C)
I
D
,
D
rain
Current
(A)
6
40
10
1.0
0.1
0.4
0.6
0.8
1.0
1.2
1.4
1.15
1.10
1.05
1.0
0.95
0.90
0.85
0.80
-50 -25
0
25
50
75
100 125 150
V
DS
=V
GS
I
D
=250 A
-50
-25
0
25
50
75 100 125 150
1.06
1.04
1.02
1.00
0.98
0.96
0.94
I
D
=250 A
50
40
30
20
10
5
0
0
10
20
30
40
V
DS
=10V
300
100
200
10
1
0.5
0.1
1
10
30
60
V
GS
=10V
Single Pulse
Tc=25 C
R
DS
(O
N)
Limi
t
DC
10ms
1ms
10
0
s
10
s
6-50
10
8
6
4
2
0
0
4
8
12
16
20
24
28
32
V
DS
=10V
I
D
=25A
Figure 11. Switching Test Circuit
Figure 12. Switching Waveforms
CED703AL/CEU703AL
t
V
V
t
t
d(on)
OUT
IN
on
r
10%
t
d(off)
90%
10%
10%
50%
50%
90%
t
off
t
f
90%
PULSE WIDTH
6
INVERTED
V
DD
R
D
V
V
R
S
V
G
GS
IN
GEN
OUT
L
Transient
Thermal
Impedance
Square Wave Pulse Duration (sec)
Figure 13. Normalized Thermal Transient Impedance Curve
r(t),Normalized
Effective
2
1
0.1
0.01
10
-5
10
-4
10
-3
10
-2
10
-1
1
10
D=0.5
0.2
0.1
0.05
0.02
0.01
P
DM
t
1
t
2
1. R
JA
(t)=r (t) * R
JA
2. R
JA
=See Datasheet
3. T
JM-
T
A
= P
DM
* R
JA
(t)
4. Duty Cycle, D=t
1
/t
2
SINGLE PULSE
6-51
PDF 
ZIP