The CS52843 provides all the nec-
essary features to implement off-
line fixed frequency current-mode
control with a minimum number
of external components.
The CS52843 incorporates a new
precision temperature-controlled
oscillator to minimize variations in
frequency. An undervoltage lock-
out ensures that V
REF
is stabilized
before the output stage is enabled.
In the CS52843 turn on is at 8.4V
and turn off at 7.6V.
Other features include low start-up
current, pulse-by-pulse current lim-
iting, and a high-current totem pole
output for driving capacitive loads,
such as gate of a power MOSFET.
The output is low in the off state,
consistent with N-channel devices.
1
Features
V
CC
Gnd
COMP
OSC
Sense
V
REF
OUTPUT
ENABLE
Internal
Bias
NOR
S
R
PWM
Latch
Current
Sensing
Comparator
R
2 R
1V
Error
Amplifier
-
+
2.50V
Set/
Reset
V
CC
Undervoltage Lock-out
34V
8.4V/7.6V
R
R
V
FB
V
CC
Pwr
V
OUT
Pwr Gnd
Oscillator
5.0 Volt
Reference
s
Optimized for Off-line
Control
s
Internally Temperature
Compensated Oscillator
s
V
REF
Stabilized before
Output Stage is Enabled
s
Very Low Start-up Current
300 A (typ)
s
Pulse-by-pulse Current
Limiting
s
Improved Undervoltage
Lockout
s
Double Pulse Suppression
s
2% 5 Volt Reference
s
High Current Totem Pole
Output
Package Options
CS52843
Current Mode PWM Control Circuit
CS52843
Description
Block Diagram
Absolute Maximum Ratings
Supply Voltage (I
CC
<30mA) ..........................................................Self Limiting
Supply Voltage (Low Impedance Source)...................................................30V
Output Current ...............................................................................................1A
Output Energy (Capacitive Load) .................................................................5J
Analog Inputs (V
FB
, V
SENSE
)...........................................................-0.3V to 5.5V
Error Amp Output Sink Current...............................................................10mA
Lead Temperature Soldering
Reflow (SMD styles only) ...........60 sec. max above 183C, 230C peak
1
7
8
2
3
4
5
6
COMP
V
FB
Sense
OSC
V
REF
V
CC
V
OUT
Gnd
8L SO Narrow
A Company
10
7
14
13
12
8
1
2
3
4
5
6
11
9
COMP
NC
V
FB
NC
Sense
NC
OSC
V
REF
NC
V
CC
V
CC
Pwr
V
OUT
Pwr Gnd
Gnd
14L SO Narrow
Rev. 12/23/97
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
2
Electrical Characteristics: -40 T
A
85C; V
CC
= 15V (Note 1); R
T
= 680; C
T
= .022F for triangle mode,
R
T
= 10k; C
T
= 3.3nF sawtooth mode unless otherwise stated.
CS52843
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
Reference Section
Output Voltage
T
J
= 25C, I
REF
= 1mA
4.90
5.00
5.10
V
Line Regulation
12 V
CC
25V
6
20
mV
Load Regulation
1 I
RE F
20mA
6
25
mV
Temperature Stability
(Note 1)
0.2
0.4
mV/C
Total Output Variation
Line, Load, Temp. (Note 1)
4.82
5.18
V
Output Noise Voltage
10Hz f 10kHz, T
J
= 25C (Note 1)
50
V
Long Term Stability
T
A
= 125C, 1000 Hrs. (Note 1)
5
25
mV
Output Short Circuit
T
A
= 25C
-30
-100
-180
mA
s
Oscillator Section
Initial Accuracy
Sawtooth Mode, T
J
= 25C (Note 1)
47
52
57
kHz
Triangle Mode, T
J
= 25C 44
52
60
kHz
Voltage Stability
12 V
CC
25V
0.2
1.0
%
Temperature Stability
Sawtooth Mode T
MIN
T
A
T
MAX
5
%
Triangle Mode T
MIN
T
A
T
MAX
(Note 1)
8
%
Amplitude
V
OSC
(peak to peak)
1.7
V
Discharge Current
T
J
= 25C 7.3
8.3
9.3
mA
T
MIN
T
A
T
MAX
6.8
9.8
mA
s
Error Amp Section
Input Voltage
V
COMP
= 2.5V
2.42
2.50
2.58
V
Input Bias Current
V
FB
= 0V
-0.3
-2.0
A
A
VOL
2 V
OUT
4V
65
90
dB
Unity Gain Bandwidth
(Note 1)
0.7
1.0
MHz
PSRR
12 V
CC
25V
60
70
dB
Output Sink Current
V
FB
= 2.7V, V
COMP
= 1.1V
2
6
mA
Output Source Current
V
FB
= 2.3V, V
COMP
= 5V
-0.5
-0.8
mA
V
OUT
HIGH
V
FB
= 2.3V, R
L
= 15k to Gnd
5
6
V
V
OUT
LOW
V
FB
= 2.7V, R
L
= 15k to V
REF
0.7
1.1
V
s
Current Sense Section
Gain
(Notes 2 & 3)
2.85
3.00
3.15
V/V
Maximum Input Signal
V
COMP
= 5V (Note 2)
0.9
1.0
1.1
V
PSRR
12 V
CC
25V (Note 2)
70
dB
Input Bias Current
V
Sense
=0V
-2
-10
A
Delay to Output
T
J
=25C (Note 1)
150
300
ns
s
Output Section
Output Low Level
I
SINK
= 20mA
0.1
0.4
V
I
SINK
= 200mA
1.5
2.2
V
Output High Level
I
SOURCE
= 20mA
13.0
13.5
V
I
SOURCE
= 200mA
12.0
13.5
V
3
CS52843
Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
8L
14L
SO Narrow
SO Narrow
1
1
COMP
Error amp output, used to compensate error amplifier.
2
3
V
FB
Error amp inverting input.
3
5
Sense
Noninverting input to Current Sense Comparator.
4
7
OSC
Oscillator timing network with Capacitor to Ground, resistor to V
REF
.
5
8
Gnd
Ground.
5
9
Pwr Gnd
Output driver Ground.
6
10
V
OUT
Output drive pin.
7
11
V
CC
Pwr
Output driver positive supply.
7
12
V
CC
Positive power supply.
8
14
V
REF
Output of 5V internal reference.
2,4,6,13
NC
No Connection.
Electrical Characteristics: -40 T
A
85C; V
CC
= 15V (Note 1); R
T
= 680; C
T
= .022F for triangle mode,
R
T
= 10k; C
T
= 3.3nF sawtooth mode unless otherwise stated.
Rise Time
T
J
= 25C, C
L
= 1nF (Note 1)
50
150
ns
Fall Time
T
J
=25C, C
L
=1nF (Note 1)
50
150
ns
Output Leakage
UVLO Active V
OUT
= 0
-.01
-10.0
A
s
Total Standby Current
Start-Up Current
300
500
A
Operating Supply Current
V
FB
=V
Sense
=0V R
T
=10k, C
T
=3.3nF
11
17
mA
V
CC
Zener Voltage
I
CC
=25mA
34
V
s
Undervoltage Lockout Section
Start Threshold
7.8
8.4
9.0
V
Min. Operating Voltage
After Turn On
7.0
7.6
8.2
V
Notes:
1.These parameters, although guaranteed, are not 100% tested in production.
2. Parameter measured at trip point of latch with V
FB
=0.
3. Gain defined as: A =
; 0 V
Sense
0.8V.
V
COMP
V
Sense
Figure 1: Startup voltage for the CS52843.
Undervoltage Lockout
During Undervoltage Lockout (Figure 1), the output driv-
er is biased to sink minor amounts of current. The output
should be shunted to ground with a resistor to prevent
activating the power switch with extraneous leakage cur-
rents.
PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
which represents the peak output inductor current (Figure
2). An increase in V
CC
causes the inductor current slope to
increase, thus reducing the duty cycle. This is an inherent
feed-forward characteristic of current mode control, since
the control voltage does not have to change during
changes of input supply voltage.
V
CC
V
ON
=8.4V
V
OFF
= 7.6V
ON/OFF Command
to reset of IC
<15mA
<500
A
V
ON
V
OFF
I
CC
V
CC
4
CS52843
Test Circuit Open Loop Laboratory Test Fixture
V
REF
V
CC
V
OUT
1k
1W
0.1
F
0.1
F
V
REF
V
CC
V
OUT
Gnd
V
FB
Sense
OSC
COMP
5k
100k
4.7k
1k
Error Amp
Adjust
4.7k
Sense
Adjust
R
T
2N2222
C
T
Gnd
A
Typical Performance Characteristics
100
200
700
1k
2k
5k
7k
10k
80
90
DUTY
CYCLE (%)
R
T
(
)
70
60
50
40
30
20
10
4k
3k
500
400
300
100
.0005
.001
.002
.003
.005
.01
.02
.03 .04
800
900
FREQ. (kHz)
C
T
(
F)
700
600
500
400
300
200
100
.05
R
T
=1.5k
R
T
=680
R
T
=10k
Oscillator Frequency vs C
T
Oscillator Duty Cycle vs R
T
Circuit Description
When the power supply sees a sudden large output cur-
rent increase, the control voltage will increase allowing the
duty cycle to momentarily increase. Since the duty cycle
tends to exceed the maximum allowed to prevent trans-
former saturation in some power supplies, the internal
oscillator waveform provides the maximum duty cycle
clamp as programmed by the selection of oscillator timing
components.
Figure 2: Timing Diagram
Figure 3: Oscillator Timing Network and Parameters
Setting the Oscillator
The times T
c
and T
d
can be determined as follows:
t
c
= R
T
C
T
ln
t
d
= R
T
C
T
ln
Substituting in typical values for the parameters in the
above formulas:
V
REF
= 5.0V, V
UPPER
= 2.7V, V
LOWER
= 1.0V, I
d
= 8.3mA,
then
t
c
0.5534R
T
C
T
t
d
= R
T
C
T
ln
For better accuracy R
T
should be 10k.
Grounding
High peak currents associated with capacitive loads neces-
sitate careful grounding techniques. Timing and bypass
capacitors should be connected close to Gnd in a single
point ground.
The transistor and 5k potentiometer are used to sample
the oscillator waveform and apply an adjustable ramp to
Sense.
)
2.3 - 0.0083 R
T
4.0 - 0.0083 R
T
(
)
V
REF
- I
d
R
T
- V
LOWER
V
REF
- I
d
R
T
- V
UPPER
(
)
V
REF
- V
LOWER
V
REF
- V
UPPER
(
V
CC
I
O
V
O
Switch
Current
EA Output
Toggle
F/F Output
OSC
RESET
V
OSC
5
CS52843
Circuit Description
V
REF
OSC
Gnd
R
T
C
T
V
upper
V
lower
t
c
t
d
V
OSC
Internal Clock
LARGE R
T
(
10k
)
V
REF
Internal Clock
SMALL R
T
(
700k
)
Triangular Mode
Sawtooth Mode
6
Part Number
Description
CS52843ED8
8L SO Narrow
CS52843EDR8
8L SO Narrow (tape & reel)
CS52843ED14
14L SO Narrow
CS52843EDR14
14L SO Narrow (tape & reel)
Rev. 12/23/97
CS52843
D
Lead Count
Metric
English
Max
Min
Max
Min
8L SO Narrow
5.00
4.80
.197
.189
14L SO Narrow
8.75
8.55
.344
.337
Thermal Data
8L SO Narrow 14L SO Narrow
R
JC
typ
45
30
C/W
R
JA
typ
165
125
C/W
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES)
PACKAGE THERMAL DATA
Ordering Information
1999 Cherry Semiconductor Corporation
Cherry Semiconductor Corporation reserves the
right to make changes to the specifications without
notice. Please contact Cherry Semiconductor
Corporation for the latest available information.
Surface Mount Narrow Body (D); 150 mil wide
1.27 (.050) BSC
0.51 (.020)
0.33 (.013)
6.20 (.244)
5.80 (.228)
4.00 (.157)
3.80 (.150)
1.57 (.062)
1.37 (.054)
D
0.25 (0.10)
0.10 (.004)
1.75 (.069) MAX
1.27 (.050)
0.40 (.016)
REF: JEDEC MS-012
0.25 (.010)
0.19 (.008)
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