1
The CS8127 contains all the necessary
control circuitry to implement a 5V lin-
ear regulator. An external pass device is
used to produce superior performance
compared to conventional monolithic
regulators. The CS8127 with a TIP42
PNP transistor typically provides a
100mV dropout voltage at 500mA,
increasing to 350mV at 3A. Quiescent
current at 500mA is only 5mA.
Monolithic regulators cannot approach
these figures because their power tran-
sistors do not provide the high beta and
excellent saturation characteristics at
high currents. The CS8127 is compatible
with a wide variety of external transis-
tors, allowing flexibility for thermal,
space, and cost management.
The CS8127 includes thermal shutdown,
externally programmable current limit,
and over-voltage shutdown, making it
suitable for use in automotive and
switching regulator post regulator appli-
cations. An optional external RC filter
added to the CS8127 supply lead pro-
vides EMC hardening in addition to the
on-chip EMC hardening. The SENSE
lead allows remote sensing of the output
voltage for improved regulation.
An active microprocessor RESET func-
tion is included on-chip with externally
programmable delay time. During
power-up, or after detection of any error
in the regulated output, the RESET lead
will remain in the low state for the dura-
tion of the delay. Types of errors include
short circuit, low input voltage, over-
voltage shutdown, thermal shutdown,
or others that cause the output to
become unregulated. This function is
independent of the input voltage and
will function correctly with an output
voltage as low as 1V. Hysteresis is
included in both the reset and delay
comparators for noise immunity and to
prevent oscillations. A latching dis-
charge circuit is used to discharge the
delay capacitor, even when triggered by
a relatively short fault condition. This
circuit improves upon the commonly
used SCR structure by providing
improved noise immunity and full
capacitor discharge (0.2V typ).
Features
+
-
-
+
+
IC
Reference
Gnd
PRE-
REGULATOR
IC
Power
Gnd
Regulated Supply
for Circuit Bias
10
mA
Delay
Current
Delay
Ref Gnd
Pwr Gnd
Thermal
Shutdown
Bandgap
Reference
Reset
Comparator
Latching
Discharge
Q S
R
V
dis
Delay
Comparator
1.25V
Error
Amp
PULLUP
V
IN
Sense
-
-
+
RESET
Over
Voltage
Shutdown
50
mA
V
OUT
s
Externally Set Delay for
Reset
s
60V Peak Transient
Capability
s
Internal Thermal
Overload Protection
s
3% Output Accuracy
s
Active RESET
s
Noise Immunity
s
On Chip EMC Hardening
Protection Incorporated
s
Externally Set Current
Limit
Package Options
8L SO & 8L PDIP
CS8127
5V Linear Controller/Driver
1
V
IN
2
3
4
Sense
Delay
V
OUT
Pwr Gnd
Pullup
Ref Gnd
8
7
6
5
RESET
CS8127
Description
Block Diagram
A Company
Rev. 2/12/99
Cherry Semiconductor Corporation
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885-3600 Fax: (401)885-5786
Email: info@cherry-semi.com
Web Site: www.cherry-semi.com
2
Note 1: Dependent on characteristics of external transistor.
Electrical Characteristics:
T
A
=-40C to +125C, T
J
=-40C to +150C, V
IN
=6 to 26V, I
OUT
=5 to 500mA, Per Test Circuit
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Absolute Maximum Ratings
Power Dissipation.............................................................................................................................................Internally Limited
Input Voltage ..................................................................................................................................................................0.3V, 26V
Transient Input Voltage ............................................................................................................................................................60V
Output Current ...............................................................................................................................................Externally Limited
ESD Susceptibility (Human Body Model)..............................................................................................................................2kV
Junction Temperature ............................................................................................................................................45C to 150C
Storage Temperature..............................................................................................................................................55C to 150C
Lead Temperature Soldering
Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260C peak
Reflow (SMD styles only) ......................................................................................60 sec. max above 183C, 230C peak
CS8127
C
Delay
x
V
DTC
I
Charge
Note 2: Delay Time =
= C
Delay
x
3.5 x 10
5
(Typical)
s Output Stage (V
OUT
)
Output Voltage
4.85
5.00
5.15
V
Dropout Voltage
I
OUT
= 500mA, note 1
0.1
0.6
V
Supply Current I
Q
I
OUT
10mA
4
8
mA
I
OUT
500mA
5
15
I
OUT
3A, note 1
30
Line Regulation
6V V
IN
26V, I
OUT
= 5mA
12
50
mV
Load Regulation
5V I
OUT
500mA, V
IN
= 14V
2
50
mV
Ripple Rejection
f = 120Hz, 7V V
IN
17V,
60
70
dB
I
OUT
= 350mA
V
IN
Overvoltage Shutdown
32
40
V
Drive Current
V
SENSE
= 6V
50
A
V
SENSE
= 0V
25
250
mA
s
and Delay Functions
Delay Charge Current, I
Charge
V
Delay
= 2V
5
10
15
A
Threshold V
RTH
V
OUT
Increasing
4.65
4.90
V
OUT
-0.10
V
V
RTL
V
OUT
Decreasing
4.50
4.70
V
OUT
-0.15
V
Hysteresis V
RH
150
200
250
mV
Delay Threshold V
DTC
Charge
3.25
3.50
3.75
V
V
DTD
Discharge
2.80
3.00
3.40
V
Delay Hysteresis, V
DH
V
DTC
- V
DTD
200
400
800
mV
Output Voltage Low
1V < V
OUT
< V
RTL
, 3k to V
OUT
0.4
V
Output V
D
> V
DTC
, V
OUT
> V
RTH
10
A
Leakage Current
Delay Capacitor (V
dis
)
Discharge Latched "ON",
0.2
0.5
V
Discharge Voltage
V
OUT
> V
RTH
Delay Time
C
Delay
= 0.1F, note 2
16
32
48
ms
RESET
RESET
RESET
RESET
RESET
3
Typical Performance Characteristics (per Test Circuit)
5.02
5.01
5
4.99
4.98
4.97
4.96
4.95
-40 -20 0
20 40 60 80 100120 140150
JUNCTION TEMPERATURE (
C)
V
OUT
(V)
5.00V @ 25
C
I
OUT
=500mA
0
0
200
400
600
800
1000
1200
1400
1600
1800
2000
RESET OUTPUT CURRENT (mA)
RESET
OUTPUT
VOL
T
AGE (mV)
Vin = 5V
0
5
10
15
20
25
30
35
40
0.00
10.00
20.00
30.00
40.00
50.00
60.00
70.00
80.00
90.00
100.00
0
1
2
3
4
5
6
7
8
9
10
VIN (V)
I Q
(mA)
I
OUT
= 3A
R
OUT
= 47W
I
OUT
= 0.5A
R
OUT
= 330
W
I
Q
vs. V
IN
RESET Voltage vs. Output Current
Temperature Performance of V
OUT
0
1
2
3
4
5
6
7
8
9
10
0.00
0.50
1.00
1.50
2.00
2.50
3.00
3.50
4.00
4.50
5.00
5.50
VIN (V)
V
OUT
(V)
IOUT=0.5A
IOUT= 3A
0
0.5
1.0
1.5
2.0
2.5
3.0
0
50
100
150
200
250
300
350
400
I
OUT
(Amps)
DROPOUT
VOL
T
AGE (mV)
ROUT = 47W
25
C
20
18
16
14
12
10
8
6
4
2
0
0
0.5
1.0
1.5
2.0
2.5
3.0
IOUT(Amps)
LOAD REGULA
TION (mV)
VIN=14V
25
C
Load Regulation vs. I
OUT
Dropout Voltage vs. I
OUT
V
OUT
vs. V
IN
6V
V
IN
- 26V
I
OUT
(Amps)
LINE REGULA
TION (mV)
20
0
15
10
5
0
0.5
1.0
1.5
2.0
2.5
3.0
25
C
40
35
30
25
20
15
10
5
0
0
0.5
1.0
1.5
2.0
2.5
3.0
VIN=14V
IOUT (Amps)
I Q
(mA)
25
C
10
100
1K
10K
100K
FREQUENCY (Hz)
1M
10M
100M
0
10
20
30
40
50
60
70
80
V
IN
/ V
OUT
(dB)
IOUT=250mA
25
C
Ripple Rejection
I
Q
vs. I
OUT
Line Regulation vs. I
OUT
Package Lead Description
PACKAGE LEAD #
LEAD SYMBOL
FUNCTION
CS8127
8L SO & PDIP
1
V
IN
Unregulated supply voltage to the IC.
2
Sense
Kelvin connection which allows remote sensing of output volt-
age for improved regulation.
3
Delay
Timing CAP for
function
4
CMOS/TTL compatible open collector output.
goes low
whenever V
OUT
drops below 6% of it's typical value.
5
Ref Gnd
Ground connection
6
Pullup
Internal pullup transistor for V
OUT
. Also Sense pin for
overvoltage shutdown.
7
Pwr Gnd
Ground connection
8
V
OUT
Supplies base current to PNP pass transistor or threshold volt-
age to FET pass transistor.
RESET
RESET
RESET
The CS8127
function is very precise, has hysteresis
on both the
and Delay comparators, a latching
Delay capacitor discharge circuit, and operation down to
1V.
The reset circuit output is an open collector type with ON
and OFF parameters as specified. The reset output NPN
transistor is controlled by the Low Voltage Inhibit and
Reset Delay circuits (see Block Diagram).
This circuit monitors output voltage, and when output
voltage is below V
RTL
, causes the reset output transistor to
be in the ON (saturation) state. When the output voltage is
above V
RTH
, this circuit permits the reset output transistor
to go into the OFF state if allowed by the reset Delay cir-
cuit.
This circuit provides a programmable (by external capaci-
tor) delay on the
output lead. The Delay lead pro-
vides source current to the external delay capacitor only
when the Low Voltage Inhibit circuit indicates that output
voltage is above V
RTH
. Otherwise, the Delay lead sinks
current to ground (used to discharge the Delay capacitor).
The discharge current is latched ON when the output volt-
age falls below V
RTL
. The Delay capacitor is fully dis-
charged anytime the output voltage falls out of regulation,
even for a short period of time. This feature ensures a con-
trolled
pulse is generated following the detection
of an error condition. The circuit allows the
out-
put transistor to go to the OFF (open) state only when the
voltage on the Delay lead is higher than V
DTC
.
RESET
RESET
RESET
RESET Delay Circuit
Low Voltage Inhibit Circuit
RESET
RESET
4
CS8127
RESET
V
RH
V
OUT
V
RTH
V
RT
L
V
RL
Delay
V
DTC
V
DTD
V
DH
T
D
V
DIS
(3)
(1)
(2)
(2)
RESET Circuit Waveform
RESET Circuit Functional Description
(1) = No Delay Capacitor
(2) = With Delay Capacitor
(3) = Max: RESET Voltage (1.0V)
5
V
IN
Sense
Delay
Ref Gnd
PULLUP
Pwr Gnd
V
OUT
R
RST
4.7 k
W
C
Delay
0.022
mF
C
O
10
mF
V
OUT
(5V)
V
IN
R
IN
220
W
C
IN
0.022
mF
TIP42B
R
OUT
220
W
Gnd
CS-8127
RESET
RESET
Test Circuit
CS8127
Application Information
The CS8127 includes an over voltage shutdown circuit.
Shutdown typically occurs at 36V.
The CS8127 includes a thermal shutdown circuit that dis-
ables the output when junction temperature exceeds
approximately 180C. This is a self-protection feature
designed to protect the CS8127. The thermal shutdown cir-
cuit does not monitor the temperature of the pass transis-
tor, which will probably be much hotter. To optimize ther-
mal shutdown, board design should minimize the differ-
ence in temperature of the CS8127 and the pass device.
External Pass Device
- Select a pass device that will deliv-
er the desired output current, withstand the maximum
expected input voltage, and dissipate the resulting power.
The CS8127 is compatible with a wide variety of Bipolar
and FET pass transistors.
Output Capacitor
- An output capacitor is required for sta-
bility in most applications. Though a 10F capacitor should
be sufficient, regulator stability is dependent on the
characteristics of the pass transistor. Capacitor effective
series resistance (ESR) also factors in system stability. Some
bench work may be required to determine the capacitor
characteristics required for use in a particular application.
BIAS Resistor
- This resistor provides bias current for the
CS8127 output stage, and prevents the pass device from
leaking. It also speeds the turn-off of the pass device
during an overvoltage transient. For proper operation over
temperature, the recommended value is 560, although it
may be increased or decreased for a particular application.
R
OUT
Resistor
- This resistor controls the drive current
available to the pass transistor. It also determines regula-
tor start-up current and short circuit current limit. For
bipolar pass transistors, it can be selected by use of the fol-
lowing formulae:
R
OUT
=
x
Q1
***
***
b
Q1
= Pass transistor minimum
b @ maximum output
current.
Typical start-up current and current limit can be calculat-
ed as follows:
I
START
+ 5mA
I
Limit
x
Q1
@ Current Limit
For example, if the minimum input voltage is 6V, maxi-
mum output current is 1Amp, and minimum transistor
b @ 1Amp is 60, then R
OUT
can be calculated as follows:
R
OUT
x 60 = 300
I
Start
+ 5mA = 18.3mA
With V
IN
= 14V, and a pass transistor
b of 40 @ current
limit:
I
Limit
x 40 = 1.7Amps
14V 1V
300
4V
300
6V 1V
1Amp
V
IN
1V
R
OUT
4V
R
OUT
V
IN(min)
1V
I
OUT(max)
External Component Selection
Thermal Shutdown
Overvoltage Shutdown
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