SmartRF
SmartRF
SmartRF
SmartRF
CC1000
Chipcon AS SmartRF
CC1000 PRELIMINARY Datasheet (rev. 2.1) 2002-04-19
Page 1 of 48
CC1000
Single Chip Very Low Power RF Transceiver
Applications
Very low power UHF wireless data
transmitters and receivers
315 / 433 / 868 and 915 MHz ISM/SRD
band systems
RKE Two-way Remote Keyless Entry
Home automation
Wireless alarm and security systems
AMR Automatic Meter Reading
Low power telemetry
Toys
Product Description
CC1000
is a true single-chip UHF trans-
ceiver designed for very low power and
very low voltage wireless applications. The
circuit is mainly intended for the ISM
(Industrial, Scientific and Medical) and
SRD (Short Range Device) frequency
bands at 315, 433, 868 and 915 MHz, but
can easily be programmed for operation at
other frequencies in the 300-1000 MHz
range.
The main operating parameters of
CC1000
can be programmed via an easy-to-
interface serial bus, thus making
CC1000
a
very flexible and easy to use transceiver.
In a typical system
CC1000
will be used
together with a microcontroller and a few
external passive components.
CC1000
is based on Chipcon's SmartRF
technology in 0.35
m CMOS.
Features
True single chip UHF RF transceiver
Very low current consumption
Frequency range 300 1000 MHz
Integrated bit synchroniser
High sensitivity (typical -110 dBm at 2.4
kBaud)
Programmable output power 20 to
10 dBm
Small size (TSSOP-28 package)
Low supply voltage (2.1 V to 3.6 V)
Very few external components required
No external RF switch / IF filter required
RSSI output
Single port antenna connection
FSK data rate up to 76.8 kBaud
Complies with EN 300 220 and FCC
CFR47 part 15
FSK modulation spectrum shaping
Programmable frequency in 250 Hz
steps makes crystal temperature drift
compensation possible without TCXO
Suitable for frequency hopping
protocols
Development kit available
Easy-to-use software for generating the
CC1000
configuration data
This document contains information on a pre-production product. Specifications and information herein are subject to
change without notice.
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CC1000
Chipcon AS SmartRF
CC1000 PRELIMINARY Datasheet (rev. 2.1) 2002-04-19
Page 2 of 48
Pin Assignment
Pin no.
Pin name
Pin type
Description
1
AVDD
Power (A)
Power supply (3 V) for analog modules (mixer and IF)
2
AGND
Ground (A)
Ground connection (0 V) for analog modules (mixer and IF)
3
RF_IN
RF Input
RF signal input from antenna
4
RF_OUT
RF output
RF signal output to antenna
5
AVDD
Power (A)
Power supply (3 V) for analog modules (LNA and PA)
6
AGND
Ground (A)
Ground connection (0 V) for analog modules (LNA and PA)
7
AGND
Ground (A)
Ground connection (0 V) for analog modules (PA)
8
AGND
Ground (A)
Ground connection (0 V) for analog modules (VCO and prescaler)
9
AVDD
Power (A)
Power supply (3 V) for analog modules (VCO and prescaler)
10
L1
Analog input
Connection no 1 for external VCO tank inductor
11
L2
Analog input
Connection no 2 for external VCO tank inductor
12 CHP_OUT
(LOCK)
Analog output
Charge pump current output
The pin can also be used as PLL Lock indicator. Output is high
when PLL is in lock.
13 R_BIAS
Analog
output Connection for external precision bias resistor (82 k, 1%)
14
AGND
Ground (A)
Ground connection (0 V) for analog modules (backplane)
15
AVDD
Power (A)
Power supply (3 V) for analog modules (general)
16
AGND
Ground (A)
Ground connection (0 V) for analog modules (general)
17
XOSC_Q2
Analog output
Crystal, pin 2
18
XOSC_Q1
Analog input
Crystal, pin 1, or external clock input
19
AGND
Ground (A)
Ground connection (0 V) for analog modules (guard)
20
DGND
Ground (D)
Ground connection (0 V) for digital modules (substrate)
21
DVDD
Power (D)
Power supply (3 V) for digital modules
22
DGND
Ground (D)
Ground connection (0 V) for digital modules
23 DIO
Digital
input/output
Data input/output. Data input in transmit mode. Data output in
receive mode
24
DCLK
Digital output
Data clock for data in both receive and transmit mode
25
PCLK
Digital input
Programming clock for 3-wire bus
26 PDATA
Digital
input/output
Programming data for 3-wire bus. Programming data input for
write operation, programming data output for read operation
27
PALE
Digital input
Programming address latch enable for 3-wire bus. Internal pull-up.
28
RSSI/IF
Analog output
The pin can be used as RSSI or 10.7 MHz IF output to optional
external IF and demodulator. If not used, the pin should be left
open (not connected).
A=Analog, D=Digital
(Top View)
1
14
15
AVDD
AGND
RF_IN
RF_OUT
AVDD
AGND
AGND
AGND
AVDD
L1
L2
R_BIAS
CHP_OUT
AGND
CC1000
2
3
4
6
5
7
8
9
11
12
13
10
28
RSSI/IF
PALE
PDATA
PCLK
DCLK
DIO
DGND
DVDD
DGND
AGND
XOSC_Q1
AGND
XOSC_Q2
AVDD
27
26
25
23
24
22
21
20
18
17
16
19
1
14
15
AVDD
AGND
RF_IN
RF_OUT
AVDD
AGND
AGND
AGND
AVDD
L1
L2
R_BIAS
CHP_OUT
AGND
CC1000
2
3
4
6
5
7
8
9
11
12
13
10
28
RSSI/IF
PALE
PDATA
PCLK
DCLK
DIO
DGND
DVDD
DGND
AGND
XOSC_Q1
AGND
XOSC_Q2
AVDD
RSSI/IF
PALE
PDATA
PCLK
DCLK
DIO
DGND
DVDD
DGND
AGND
XOSC_Q1
AGND
XOSC_Q2
AVDD
27
26
25
23
24
22
21
20
18
17
16
19
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CC1000
Chipcon AS SmartRF
CC1000 PRELIMINARY Datasheet (rev. 2.1) 2002-04-19
Page 3 of 48
Absolute Maximum Ratings
Parameter
Min.
Max.
Units
Condition
Supply voltage, VDD
-0.3
5.0
V
Voltage on any pin
-0.3
VDD+0.3,
max 5.0
V
Input RF level
10
dBm
Storage temperature range
-50
150
C
Operating ambient temperature
range
-40 85
C
Lead temperature
260
C
T = 10 s
Under no circumstances the absolute
maximum ratings given above should be
violated. Stress exceeding one or more of
the limiting values may cause permanent
damage to the device.
Caution! ESD sensitive device.
Precaution should be used when handling
the device in order to prevent permanent
damage.
Electrical Specifications
Tc = 25
C, VDD = 3.0 V if nothing else stated
Parameter
Min.
Typ.
Max.
Unit Condition / Note
Overall
RF Frequency Range
300
1000
MHz
Programmable in steps of 250 Hz
Transmit Section
Transmit data rate
0.6
76.8
kBaud NRZ or Manchester encoding.
76.8 kBaud equals 76.8 kbit/s
using NRZ coding. See page 14.
Binary FSK frequency separation
0
65
kHz
The frequency corresponding to
the digital "0" is denoted f
0
, while
f
1
corresponds to a digital "1".
The frequency separation is f
1
-f
0
.
The RF carrier frequency, f
c
, is
then given by f
c
=(f
0
+f
1
)/2.
(The frequency deviation is given
by f
d
=+/-(f
1
-f
0
)/2 )
The frequency separation is
programmable in 250 Hz steps.
65 kHz is the minimum
guaranteed separation at 1 MHz
reference frequency. Larger
separations can be achieved at
higher reference frequencies.
Output power
433 MHz
868 MHz
-20
-20
10
5
dBm
Delivered to 50
load.
The output power is
programmable.
RF output impedance
433/868 MHz
140 / 80
Transmit mode. For matching
details see "Input/ output
matching" p.28.
Harmonics
-20
dBc
An external LC or SAW filter
should be used to reduce
harmonics emission to comply
with SRD requirements. See
p.34.
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CC1000
Chipcon AS SmartRF
CC1000 PRELIMINARY Datasheet (rev. 2.1) 2002-04-19
Page 4 of 48
Parameter
Min.
Typ.
Max.
Unit Condition / Note
Receive Section
Receiver Sensitivity, 433 MHz
Optimum sensitivity (9.3 mA)
Low current consumption (7.4 mA)
Receiver Sensitivity, 868 MHz
Optimum sensitivity (11.8 mA)
Low current consumption (9.6 mA)
-110
-109
-107
-105
dBm
dBm
2.4 kBaud, Manchester coded
data, 64 kHz frequency
separation, BER = 10
-3
See Table 5 and Table 6 page 19
for typical sensitivity figures at
other data rates.
System noise bandwidth
30
kHz
2.4 kBaud, Manchester coded
data
Cascaded noise figure
433/868 MHz
12/13 dB
Saturation
10
dBm
2.4 kBaud, Manchester coded
data, BER = 10
-3
Input IP3
-18
dBm
From LNA to IF output
Blocking
40
dBc
At +/- 1 MHz
LO leakage
-57
dBm
Input impedance
88-j26
70-j26
52-j7
52-j4
Receive mode, series equivalent
at 315 MHz
at 433 MHz
at 868 MHz.
at 915 MHz
For matching details see "Input/
output matching" p. 28.
Turn on time
11
128
Baud
The turn-on time is determined by
the demodulator settling time,
which is programmable. See p.
17
IF Section
Intermediate frequency (IF)
150
10.7
kHz
MHz
Internal IF filter
External IF filter
IF bandwidth
175 kHz
RSSI dynamic range
-105 -50
dBm
RSSI accuracy
6
dB
See p.30 for details
RSSI linearity
2
dB
Frequency Synthesiser
Section
Crystal Oscillator Frequency
3
16
MHz
Crystal frequency can be 3-4, 6-8
or 9-16 MHz. Recommended
frequencies are 3.6864, 7.3728,
11.0592 and 14.7456. See page
32 for details.
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CC1000
Chipcon AS SmartRF
CC1000 PRELIMINARY Datasheet (rev. 2.1) 2002-04-19
Page 5 of 48
Parameter
Min.
Typ.
Max.
Unit Condition / Note
Crystal frequency accuracy
requirement
50
25
ppm
433
MHz
868 MHz
The crystal frequency accuracy
and drift (ageing and
temperature dependency) will
determine the frequency
accuracy of the transmitted
signal.
Crystal operation
Parallel
C171 and C181 are loading
capacitors, see page 32
Crystal load capacitance
12
12
12
22
16
16
30
30
16
pF
pF
pF
3-8 MHz, 22 pF recommended
6-8 MHz, 16 pF recommended
9-16 MHz, 16 pF recommended
Crystal oscillator start-up time
5
1.5
2
ms
ms
ms
3.6864 MHz, 16 pF load
7.3728 MHz, 16 pF load
16 MHz, 16 pF load
Output signal phase noise
-85
dBc/Hz At 100 kHz offset from carrier
PLL lock time (RX / TX turn time)
200 s
Up to 1 MHz frequency step
PLL turn-on time, crystal oscillator
on in power down mode
250 s
Crystal oscillator running
Digital Inputs/Outputs
Logic "0" input voltage
0
0.3*VDD
V
Logic "1" input voltage
0.7*VDD VDD V
Logic "0" output voltage
0
0.4
V
Output current -2.5 mA,
3.0 V supply voltage
Logic "1" output voltage
2.5
VDD
V
Output current 2.5 mA,
3.0 V supply voltage
Logic "0" input current
NA -1
A
Input signal equals GND
Logic "1" input current
NA 1 A
Input signal equals VDD
DIO setup time
20
ns
TX mode, minimum time DIO
must be ready before the positive
edge of DCLK
DIO hold time
10
ns
TX mode, minimum time DIO
must be held after the positive
edge of DCLK
Serial interface (PCLK, PDATA and
PALE) timing specification
See Table 2 page 12
Power Supply
Supply voltage
2.1
3.0
3.6
V
V
Recommended operation voltage
Operating limits
Power Down mode
0.2 1 A
Oscillator core off
Current Consumption,
receive mode 433/868 MHz
7.4/9.6
mA
Current is programmable and can
be increased for improved
sensitivity
Current Consumption,
average in receive mode using
polling 433/868 MHz
74/96 A
Polling controlled by micro-
controller using 1:100 receive to
power down ratio
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