Copyright
Cirrus Logic, Inc. 2005
(All Rights Reserved)
http://www.cirrus.com
114 dB, 192 kHz
6
-Channel D/A Converter
Features
!
Advanced Multi-bit Delta Sigma Architecture
!
24-bit Conversion
!
Automatic Detection of Sample Rates up to 192
kHz
!
114 dB Dynamic Range
!
-100 dB THD+N
!
Direct Stream Digital Mode
Non-Decimating Volume Control
On-Chip 50 kHz Filter
Matched PCM and DSD Analog Output
Levels
!
Compatible with Industry-Standard Time
Division Multiplexed (TDM) Serial Interface
!
Selectable Digital Filters
!
Volume Control with 1/2-dB Step Size and Soft
Ramp
!
Low Clock Jitter Sensitivity
!
+5 V Analog Supply, +2.5 V Digital Supply
!
Separate 1.8 to 5 V Logic Supplies for the
Control & Serial Ports
Description
The CS4365 is a complete 6-channel digital-to-analog
system. This D/A system includes digital de-emphasis,
half-dB step size volume control, ATAPI channel mix-
ing, selectable fast and slow digital interpolation filters
followed by an oversampled, multi-bit delta sigma mod-
ulator which includes mismatch shaping technology that
eliminates distortion due to capacitor mismatch. Follow-
ing this stage is a multi-element switched capacitor
stage and low-pass filter with differential analog
outputs.
The CS4365 also has a proprietary DSD processor
which allows for volume control and 50 kHz on-chip fil-
tering without an intermediate decimation stage. It also
offers an optional path for direct DSD conversion by di-
rectly using the multi-element switched capacitor array.
The CS4365 accepts PCM data at sample rates from
4 kHz to 216 kHz, DSD audio data, and delivers excel-
lent sound quality. These features are ideal for multi-
channel audio systems including SACD players, A/V re-
ceivers, digital TV's, mixing consoles, effects
processors, sound cards and automotive audio
systems.
ORDERING INFORMATION
See page 45.
Control Port Supply = 1.8 V to 5 V
Register/Hardware
Configuration
Internal Voltage
Reference
Reset
Serial Interface
Level Tr
anslator
Level Tr
anslator
TDM Serial
Audio Input
Digital Supply = 2.5 V
Hardware Mode or
I
2
C/SPI Software Mode
Control Data
Analog Supply = 5 V
Six Channels of
Differential
Outputs
6
6
PCM Serial
Audio Input
Volume
Controls
Digital
Filters
Switch-Cap
DAC and
Analog Filters
Multi-bit
Modulators
DSD Audio
Input
DSD Processor
-Volume control
-50 kHz filter
External Mute
Control
Mute Signals
6
6
Serial Audio Port
Supply = 1.8 V to 5 V
MAY '05
DS670PP1
CS4365
2
DS670PP1
CS4365
TABLE OF CONTENTS
1. PIN DESCRIPTION..................................................................................................................... 6
2. CHARACTERISTICS AND SPECIFICATIONS.......................................................................... 8
3. APPLICATIONS ....................................................................................................................... 20
3.1 Master Clock..................................................................................................................... 20
3.2 Mode Select...................................................................................................................... 21
3.3 Digital Interface Formats .................................................................................................. 22
3.3.1 OLM #1 ................................................................................................................ 23
3.3.2 OLM #2 ................................................................................................................ 24
3.3.3 TDM ..................................................................................................................... 24
3.4 Oversampling Modes........................................................................................................ 24
3.5 Interpolation Filter............................................................................................................. 25
3.6 De-Emphasis .................................................................................................................... 25
3.7 ATAPI Specification.......................................................................................................... 26
3.8 Direct Stream Digital (DSD) Mode.................................................................................... 26
3.9 Grounding and Power Supply Arrangements ................................................................... 27
3.9.1 Capacitor Placement............................................................................................ 27
3.10 Analog Output and Filtering............................................................................................ 27
3.11 The MUTEC Outputs ...................................................................................................... 29
3.12 Recommended Power-Up Sequence ............................................................................. 29
3.12.1 Hardware Mode ................................................................................................. 29
3.12.2 Software Mode................................................................................................... 29
3.13 Recommended Procedure for Switching Operational Modes......................................... 30
3.14 Control Port Interface ..................................................................................................... 31
3.14.1 MAP Auto Increment.......................................................................................... 31
3.14.2 I
2
C Mode............................................................................................................ 31
3.14.2.1 I
2
C Write ............................................................................................ 31
3.14.2.2 I
2
C Read ............................................................................................ 32
3.14.3 SPITM Mode........................................................................................................ 33
3.14.3.1 SPI Write............................................................................................ 33
3.15 Memory Address Pointer (MAP) ............................................................................... 33
4. REGISTER QUICK REFERENCE ........................................................................................... 34
5. REGISTER DESCRIPTION ...................................................................................................... 35
5.1 Chip Revision (address 01h) ........................................................................................... 35
5.1.1 Part Number ID (part) [Read Only] ...................................................................... 35
5.2 Mode Control 1 (address 02h) .......................................................................................... 35
5.2.1 Control Port Enable (CPEN) ................................................................................ 35
5.2.2 Freeze Controls (Freeze)..................................................................................... 35
5.2.3 PCM/DSD Selection (DSD/PCM)......................................................................... 36
5.2.4 DAC Pair Disable (DACx_DIS) ............................................................................ 36
5.2.5 Power Down (PDN).............................................................................................. 36
5.3 PCM Control (address 03h) ............................................................................................. 36
5.3.1 Digital Interface Format (dif) ................................................................................ 36
5.3.2 Functional Mode (FM).......................................................................................... 37
5.4 DSD Control (address 04h) ............................................................................................. 37
5.4.1 DSD Mode Digital Interface Format (DSD_dif) .................................................... 37
5.4.2 Direct DSD Conversion (DIR_DSD)..................................................................... 38
5.4.3 Static DSD Detect (static_DSD)........................................................................... 38
5.4.4 Invalid DSD Detect (invalid_DSD) ....................................................................... 38
5.4.5 DSD Phase Modulation Mode Select (DSD_PM_mode) ..................................... 38
5.4.6 DSD Phase Modulation Mode Enable (DSD_pm_EN) ........................................ 38
5.5 Filter Control (address 05h) ............................................................................................. 39
5.5.1 Interpolation Filter Select (FILT_SEL).................................................................. 39
DS670PP1
3
CS4365
5.6 Invert Control (address 06h) ............................................................................................ 39
5.6.1 Invert Signal Polarity (Inv_xx) .............................................................................. 39
5.7 Group Control (address 07h)........................................................................................... 39
5.7.1 Mute Pin Control (MUTEC1, MUTEC0) ............................................................... 39
5.7.2 Channel A Volume = Channel B Volume (Px_A=B) ............................................ 40
5.7.3 Single Volume Control (Snglvol) .......................................................................... 40
5.8 Ramp and Mute (address 08h) ........................................................................................ 40
5.8.1 Soft Ramp AND Zero Cross CONTROL (SZC) ................................................... 40
5.8.2 Soft Volume Ramp-Up after Error (RMP_UP) ..................................................... 41
5.8.3 Soft Ramp-Down before Filter Mode Change (RMP_DN) ................................... 41
5.8.4 PCM Auto-Mute (PAMUTE) ................................................................................. 41
5.8.5 DSD Auto-Mute (DAMUTE) ................................................................................. 41
5.8.6 MUTE Polarity and DETECT (MUTEP1:0) .......................................................... 42
5.9 Mute Control (address 09h) ............................................................................................. 42
5.9.1 Mute (MUTE_xx).................................................................................................. 42
5.10 Mixing Control (address 0Ah, 0Dh, 10h, 13h)................................................................ 43
5.10.1 De-Emphasis Control (PX_DEM1:0).................................................................. 43
5.11 ATAPI Channel Mixing and Muting (ATAPI) ................................................................... 43
5.12 Volume Control (address 0Bh, 0Ch, 0Eh, 0Fh, 11h, 12h) ............................................. 44
5.12.1 Digital Volume Control (xx_VOL7:0) .................................................................. 44
5.13 PCM Clock Mode (address 16h).................................................................................... 45
5.13.1 Master Clock DIVIDE by 2 ENABLE (mclkdiv)................................................... 45
6. PARAMETER DEFINITIONS.................................................................................................... 46
7. REFERENCES.......................................................................................................................... 46
8. ORDERING INFORMATION .................................................................................................... 46
9. PACKAGE DIMENSIONS ........................................................................................................ 47
10. APPENDIX ............................................................................................................................. 48
4
DS670PP1
CS4365
LIST OF FIGURES
Figure 1. Serial Audio Interface Timing..................................................................................................... 14
Figure 2. TDM Serial Audio Interface Timing ............................................................................................ 14
Figure 3. Direct Stream Digital - Serial Audio Input Timing....................................................................... 15
Figure 4. Direct Stream Digital - Serial Audio Input Timing for Phase Modulation mode.......................... 15
Figure 5. Control Port Timing - I
2
C Format ............................................................................................... 16
Figure 6. Control Port Timing - SPI Format............................................................................................... 17
Figure 7. Typical Connection Diagram, Software Mode............................................................................ 18
Figure 8. Typical Connection Diagram, Hardware Mode .......................................................................... 19
Figure 9. Format 0 - Left-Justified up to 24-bit Data ................................................................................. 22
Figure 10. Format 1 - I
2
S up to 24-bit Data............................................................................................... 22
Figure 11. Format 2 - Right-Justified 16-bit Data ...................................................................................... 22
Figure 12. Format 3 - Right-Justified 24-bit Data ...................................................................................... 22
Figure 13. Format 4 - Right-Justified 20-bit Data ...................................................................................... 23
Figure 14. Format 5 - Right-Justified 18-bit Data ...................................................................................... 23
Figure 15. Format 8 - One Line Mode 1.................................................................................................... 23
Figure 16. Format 9 - One Line Mode 2.................................................................................................... 24
Figure 17. Format 12 - TDM Mode............................................................................................................ 24
Figure 18. De-Emphasis Curve................................................................................................................. 25
Figure 19. ATAPI Block Diagram (x = channel pair 1, 2, or 3) .................................................................. 26
Figure 20. DSD phase modulation mode diagram .................................................................................... 27
Figure 21. Full-Scale Output ..................................................................................................................... 28
Figure 22. Recommended Output Filter.................................................................................................... 28
Figure 23. Recommended Mute Circuitry ................................................................................................. 29
Figure 24. Control Port Timing, I
2
C Mode................................................................................................. 32
Figure 25. Control Port Timing, SPI mode ................................................................................................ 33
Figure 26. Single-Speed (fast) Stopband Rejection.................................................................................. 48
Figure 27. Single-Speed (fast) Transition Band ........................................................................................ 48
Figure 28. Single-Speed (fast) Transition Band (detail) ............................................................................ 48
Figure 29. Single-Speed (fast) Passband Ripple ...................................................................................... 48
Figure 30. Single-Speed (slow) Stopband Rejection ................................................................................ 48
Figure 31. Single-Speed (slow) Transition Band....................................................................................... 48
Figure 32. Single-Speed (slow) Transition Band (detail)........................................................................... 49
Figure 33. Single-Speed (slow) Passband Ripple..................................................................................... 49
Figure 34. Double-Speed (fast) Stopband Rejection ................................................................................ 49
Figure 35. Double-Speed (fast) Transition Band....................................................................................... 49
Figure 36. Double-Speed (fast) Transition Band (detail)........................................................................... 49
Figure 37. Double-Speed (fast) Passband Ripple..................................................................................... 49
Figure 38. Double-Speed (slow) Stopband Rejection ............................................................................... 50
Figure 39. Double-Speed (slow) Transition Band ..................................................................................... 50
Figure 40. Double-Speed (slow) Transition Band (detail) ......................................................................... 50
Figure 41. Double-Speed (slow) Passband Ripple ................................................................................... 50
Figure 42. Quad-Speed (fast) Stopband Rejection ................................................................................... 50
Figure 43. Quad-Speed (fast) Transition Band ......................................................................................... 50
Figure 44. Quad-Speed (fast) Transition Band (detail) ............................................................................. 51
Figure 45. Quad-Speed (fast) Passband Ripple ....................................................................................... 51
Figure 46. Quad-Speed (slow) Stopband Rejection.................................................................................. 51
Figure 47. Quad-Speed (slow) Transition Band........................................................................................ 51
Figure 48. Quad-Speed (slow) Transition Band (detail)............................................................................ 51
Figure 49. Quad-Speed (slow) Passband Ripple...................................................................................... 51
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