Advance Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
1
Copyright
Cirrus Logic, Inc. 2001
(All Rights Reserved)
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.cirrus.com
CS44L10
Digital PWM Headphone Monitor
Features
l
Up to 100 dB Dynamic Range
l
2.4 V to 5.0 V supply
l
Sample rates up to 96 kHz
l
Digital Tone Control
--3 selectable HPF and LPF corner frequencies
--12 dB boost for bass and treble - 1 dB step size
l
Programmable Digital volume control
--+18 to -96 dB in 1 dB steps
l
Peak signal soft limiting
l
De-emphasis for 32 kHz, 44.1 kHz, and 48
kHz
l
Selectable outputs for each channel including
--Channel A: R, L, mono (L + R) / 2, mute
--Channel B: R, L, mono (L + R) / 2, mute
l
PWM PopGuard
l
100 mW/Channel into 16
@ 3.6 V
Description
The CS44L10 is a complete stereo digital-to-PWM Class D au-
dio amplifier system controller including interpolation, volume
control, and a headphone amplifier in a 16-pin TSSOP
package.
The CS44L10 architecture uses a direct-to-digital approach
that maintains digital signal integrity to the final output filter.
This minimizes analog interference effects that can negatively
affect system performance.
The CS44L10 contains on-chip digital bass and treble boost,
peak signal limiting, and de-emphasis. The PWM amplifier can
achieve greater than 90% efficiency. This efficiency leads to
longer battery life for portable systems, smaller device pack-
age, less heat sink requirements, and smaller power supplies.
The CS44L10 is ideal for portable audio, headphone amplifi-
ers, and mobile phones.
ORDERING INFORMATION
CS44L10-KZ -10 to 70 C 16-pin TSSOP
Multibit
Modulator with
Correction
Multibit
Modulator with
Correction
Digital Volume
Control,
Bass/Treble
Boost,
Compression
Limiting,
De-emphasis
Control Port
SCL/DIF0
MCLK
Serial
Port
SDA/DEM
VL
PWM
Conversion
PWM
Conversion
HP_B
VA_HPB
GND_HPB
Level
Shifter
VA_HPA
Level
Shifter
HP_A
GND_HPA
RST
Interpolation
SCLK
LRCK
Input Sampling Rate
LRCLK/MCLK Ratio
SDIN
Audio
MAY `01
DS541PP1
CS44L10
2
DS541PP1
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ........................................................................ 4
2. TYPICAL CONNECTION DIAGRAMS ................................................................................... 10
3. REGISTER QUICK REFERENCE ...................................................................................... 12
4. REGISTER DESCRIPTIONS .................................................................................................. 13
5. PIN DESCRIPTION ................................................................................................................. 25
6. APPLICATIONS ..................................................................................................................... 26
6.1 Grounding and Power Supply Decoupling ...................................................................... 26
6.2 Clock Modes ................................................................................................................... 26
6.3 De-Emphasis .................................................................................................................. 26
6.4 PWM PopGuard Transient Control ................................................................................. 26
6.5 Recommended Power-up Sequence .............................................................................. 27
6.5.1 Stand Alone Mode ................................................................................................ 27
6.5.2 Control Port Mode ................................................................................................ 27
7. CONTROL PORT INTERFACE .............................................................................................. 28
7.1 Two-Wire Format ............................................................................................................ 28
7.1.1 Writing in Two-Wire Format ................................................................................. 28
7.1.2 Reading in Two-Wire Format ............................................................................... 28
7.2 Memory Address Pointer (MAP) ................................................................................... 29
7.2.1 INCR (Auto Map Increment Enable) .................................................................... 29
7.2.2 MAP3-0 (Memory Address Pointer) ..................................................................... 29
8. PARAMETER DEFINITIONS .................................................................................................. 32
9. PACKAGE DIMENSIONS ....................................................................................................... 33
LIST OF FIGURES
Figure 1. Serial Audio Data Interface Timing .................................................................................. 7
Figure 2. Control Port Timing - Two-Wire Format ........................................................................... 9
Figure 3. Typical CS44L10 Connection Diagram Stand-Alone Mode ........................................... 10
Figure 4. Typical CS44L10 Connection Diagram Control Port Mode ............................................ 11
Figure 5. Dynamics Control Block Diagram .................................................................................. 20
Figure 6. De-Emphasis Curve ....................................................................................................... 23
Figure 7. Control Port Timing, Two-Wire Format .......................................................................... 28
Figure 8. Single Speed Stopband Rejection ................................................................................. 30
Figure 9. Single Speed Transition Band........................................................................................ 30
Figure 10. Single Speed Transition Band (Detail) ......................................................................... 30
Figure 11. Single Speed Passband Ripple.................................................................................... 30
Figure 12. Double Speed Stopband Rejection .............................................................................. 30
Contacting Cirrus Logic Support
For a complete listing of Direct Sales, Distributor, and Sales Representative contacts, visit the Cirrus Logic web site at:
http://www.cirrus.com/corporate/contacts/sales.cfm
Preliminary product information describes products which are in production, but for which full characterization data is not yet available. Advance product infor-
mation describes products which are in development and subject to development changes. Cirrus Logic, Inc. has made best efforts to ensure that the information
contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of
any kind (express or implied). Customers are advised to obtain the latest version of relevant information to verify, before placing orders, that information being
relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those
pertaining to warranty, patent infringement, and limitation of liability. No responsibility is assumed by Cirrus Logic, Inc. for the use of this information, including
use of this information as the basis for manufacture or sale of any items, nor for infringements of patents or other rights of third parties. This document is the
property of Cirrus Logic, Inc. and by furnishing this information, Cirrus Logic, Inc. grants no license, express or implied under any patents, mask work rights,
copyrights, trademarks, trade secrets or other intellectual property rights of Cirrus Logic, Inc. Cirrus Logic, Inc., copyright owner of the information contained
herein, gives consent for copies to be made of the information only for use within your organization with respect to Cirrus Logic integrated circuits or other parts
of Cirrus Logic, Inc. The same consent is given for similar information contained on any Cirrus Logic website or disk. This consent does not extend to other
copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale. The names of products of Cirrus Logic,
Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some
jurisdictions. A list of Cirrus Logic, Inc. trademarks and service marks can be found at
http://www.cirrus.com
.
CS44L10
DS541PP1
3
Figure 13. Double Speed Transition Band .................................................................................... 30
Figure 14. Double Speed Transition Band (Detail) ....................................................................... 31
Figure 15. Double Speed Passband Ripple .................................................................................. 31
Figure 16. Left Justified, up to 24-Bit Data.................................................................................... 31
Figure 17. Right Justified, 24-Bit Data ......................................................................................... 31
Figure 18. I
2
S, Up to 24-Bit Data ................................................................................................. 31
Figure 19. Right Justified, 16-Bit Data .......................................................................................... 32
LIST OF TABLES
Table 1. Register Quick Reference .............................................................................................. 12
Table 2. Example Volume Settings .............................................................................................. 15
Table 3. Example Bass Boost Settings ........................................................................................ 15
Table 4. Example Treble Boost Settings ...................................................................................... 15
Table 5. Base Boost Corner Frequencies in Single Speed Mode ................................................ 16
Table 6. Base Boost Corner Frequencies in Double Speed Mode .............................................. 16
Table 7. Treble Boost Corner Frequencies in Single Speed Mode .............................................. 17
Table 8. Example Limiter Attack Rate Settings ............................................................................ 18
Table 9. Example Limiter Release Rate Settings ......................................................................... 18
Table 10. ATAPI Decode ............................................................................................................. 19
Table 11. Single Speed Clock Modes - Control Port Mode .......................................................... 21
Table 12. Single Speed Clock Modes - Stand-Alone Mode ......................................................... 22
Table 13. Double Speed Clock Modes - Control Port Mode ........................................................ 22
Table 14. Double Speed Clock Modes - Stand-Alone Mode ........................................................ 22
Table 15. Digital Interface Format (Stand-Alone Mode) ............................................................... 25
CS44L10
4
DS541PP1
1. CHARACTERISTICS AND SPECIFICATIONS
(T
A
= 25 C; GND = 0 V; Logic "1" = VL = 2.4 V; Logic "0" = GND = 0 V; Full-Scale Output Sine Wave, 997 Hz,
MCLK = 12.288 MHz, Measurement Bandwidth 10 Hz to 20 kHz, unless otherwise specified; Fs for Single Speed
Mode = 48 kHz, SCLK = 3.072 MHz; Fs for Double Speed Mode = 96 kHz, SCLK = 6.144 MHz. Test load
R
L
= 16
, C
L
= 10pF.) (See Typical CS44L10 Connection Diagram.)
Parameter
Symbol
Min
Typ
Max
Unit
Headphone Output Dynamic Performance for VD = VL = VA_HPx = 2.4 V
Dynamic Range
18 to 24-Bit
A-Weighted
UnWeighted
16-Bit
A-Weighted
Unweighted
TBD
TBD
-
-
93
91
91
89
-
-
-
-
dB
dB
dB
dB
Total Harmonic Distortion + Noise
0 dBFS
-20 dBFS
-60 dBFS
THD+N
-
-
-
-62
-71
-31
TBD
-
-
dB
dB
dB
Interchannel Isolation
(1 kHz)
-
TBD
-
dB
Headphone Output Dynamic Performance for VD = VL = VA_HPx = 3.0 V
Dynamic Range
18 to 24-Bit
A-Weighted
UnWeighted
16-Bit
A-Weighted
Unweighted
TBD
TBD
-
-
95
92
92
90
-
-
-
-
dB
dB
dB
dB
Total Harmonic Distortion + Noise
0 dB
-20 dB
-60 dB
THD+N
-
-
-
-64
-72
-32
TBD
-
-
dB
dB
dB
Interchannel Isolation
(1 kHz)
-
TBD
-
dB
Headphone Output Dynamic Performance for VD = VL = VA_HPx = 5.0 V
Dynamic Range
18 to 24-Bit
A-Weighted
UnWeighted
16-Bit
A-Weighted
Unweighted
TBD
TBD
-
-
99
96
91
93
-
-
-
-
dB
dB
dB
dB
Total Harmonic Distortion + Noise
0 dB
-20 dB
-60 dB
THD+N
-
-
-
-67
-76
-36
TBD
-
-
dB
dB
dB
Interchannel Isolation
(1 kHz)
-
TBD
-
dB
CS44L10
DS541PP1
5
CHARACTERISTICS AND SPECIFICATIONS
(Continued)
Note:
1. Filter response is not tested but is guaranteed by design.
2. Response is clock dependent and will scale with Fs. Note that the response plots (Figures 8-15) have
been normalized to Fs and can be de-normalized by multiplying the X-axis scale by Fs.
3. Referenced to a 1 kHz, full-scale sine wave.
4. For Single Speed Mode, the measurement bandwidth is 0.5465 Fs to 3 Fs.
For Double Speed Mode, the measurement bandwidth is 0.577 Fs to 1.4 Fs.
5. De-emphasis is not available in double speed mode.
Parameters
Symbol
Min
Typ
Max
Units
PWM Headphone Output
Full Scale Headphone Output Voltage
TBD
0.85 x VA_HP
TBD
Vp
Headphone Output Quiescent Voltage
-
0.5 x VA_HP
-
VDC
Interchannel Gain Mismatch
-
0.1
-
dB
Modulation Index
-
-
85
%
Maximum Headphone Output
VA_HPx=2.4V
AC-Current
VA_HPx=5.0V
I
HP
-
-
45
80
-
-
mA
mA
Parameter
Single Speed Mode
Double Speed Mode
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Digital Filter Response (Note 1))
Passband
to -0.05 dB corner
(Note 2)
to -0.1 dB corner
to -3 dB corner
0
-
0
-
-
-
.4535
-
.4998
-
0
0
-
-
-
-
.4426
.4984
Fs
Fs
Fs
Frequency Response 10 Hz to 20 kHz
(Note 3)
-.02
-
+.08
0
-
+0.11
dB
StopBand
.5465
-
-
.577
-
-
Fs
StopBand Attenuation
(Note 4)
50
-
-
55
-
-
dB
Group Delay
tgd
-
9/Fs
-
-
4/Fs
-
s
Passband Group Delay Deviation
0 - 40 kHz
0 - 20 kHz
-
-
-
0.36/Fs
-
-
-
-
1.39/Fs
0.23/Fs
-
-
s
s
De-emphasis Error
Fs = 32 kHz
(Relative to 1 kHz)
Fs = 44.1 kHz
Fs = 48 kHz
-
-
-
-
-
-
+.2/-.1
+.05/-.14
+0/-.22
(Note 5)
dB
dB
dB
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