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MXED103
168-Channel OLED Column Driver
15580-
January 17, 2002
Subject To Change Without Notice
Advance Information
FEATURES
CMOS High Voltage Process: 9V-30V Display
Panel Supply Compatible
168 Output Channels, Cascadable
Token-Based Bidirectional Data Transfer: Direct
User Control of Scan Rate
Current Source Magnitude User Control:
4 A to 1 mA
6-Bit Gray-Scale User Control
Current matching accuracy: 2% 1.5 A intra-
die 1% inter-die
Precharge Options
Built-In A-to-D Converter Monitoring of Display
Panel Characteristics
3.3 V to 5 V logic supply
25 MHz clock frequency
Gold-Bumped Die @ 60 micron Output Pitch
TCP packaging
Companion to Clare Micronix MXED203 160-
Channel OLED Row Driver
For All Monochrome Passive-Matrix
Organic-Light-Emitting-Diode Displays
!
Small-Molecule and Polymer
!
Current-Sourcing Anode Drivers
Description
The MXED103 is supports up to 168-
monochromatic OLED pixels. Intended primarily
for the popular 160-column PDA format, the
MXED103 is a cost-effective, versatile OLED
column driver. The MXED103's exceptionally tight
current-matching of adjacent and cascaded
outputs, precharge options, and OLED monitoring
capability, ensures uniform luminance and high-
quality greyscaling.
OPERATION
Overview: The MXED103 is configured via a serial port, and pixel data is updated on a per-row basis
via the parallel data bus.
Dynamic Pixel Control: Gray-Scale Control data is loaded into the 6-bit Column Exposure Counters
each row scan time, while the previously loaded data is being output to the OLED Display Panel. The
control data sets the exposure time from 0 to 63 Exposure Clock times. Successive counters are
accessed upon coincidence with the token bit, which is shifted the length of the MXED103 by the Token
Shift Clock. The 6-bit Databus is used to enter per-pixel data, and the Token traverses length of the
Chip in 168 Token Shift Clocks.
Chip Configuration: A display controller may use the serial bus to set the characteristics of all column
driver ICs by writing to all column driver ICs in parallel. During write, the controller writes the entire data
packet. The controller can also interrogate a single column driver IC, whose MASTER pin is pulled high.
Only one column driver IC on a given bus can be designated as master. During read, the controller
writes the preamble, start of frame delimiter, register address, and turn around bits. It then tri-states for
the bus tri-state and data bits and reads the data.
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