BC358239A -ds-001Pb
Copyright CSR 2003
Advance Information
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Device Features
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Single Chip Bluetooth System
Advance Information Datasheet For
BC358239A
Fully Qualified Bluetooth system
Bluetooth v1.2 Specification Compliant
DSP Open Platform Co-Processor
Full Speed Bluetooth Operation with Full Piconet
Support
Scatternet Support
Low Power 1.8V Operation
10 x 10mm 96-ball LFBGA Package
Minimum External Components
Integrated 1.8V regulator
Dual UART Ports
16-bit Stereo Audio CODEC
I
2
S and SPDIF Interfaces
RF `Plug `n' Go' package
June 2003
General Description
Applications
BlueCore3-Multimedia is a single chip radio and
baseband IC for Bluetooth 2.4GHz systems.
BC358239A contains 8Mbit of internal Flash memory.
When used with the CSR Bluetooth software stack, it
provides a fully compliant Bluetooth system to v1.2 of
the specification for data and voice communications.
Stereo Headphones
Automotive Hands-Free Kits
Echo Cancellation
High Performance Telephony Headsets
Enhanced Audio Applications
A/V Profile Support
BlueCore3-Multimedia System Architecture
BlueCore3-Multimedia contains an open platform digital
signal processor (DSP) co-processor allowing for
support of enhanced audio applications.
BlueCore3-Multimedia has been designed to reduce the
number of external components required which ensures
production costs are minimised.
The device incorporates auto-calibration and built-in
self-test (BIST) routines to simplify development, type
approval and production test. All hardware and device
firmware is fully compliant with the Bluetooth v1.2
Specification.
2.4
GHz
Radio
I/O
XTAL
RF IN
RF OUT
FLASH
RAM
Baseband
DSP
MCU
DSP
Co-Processor
SPI
UART/USB
PIO
Audio In/Out
PCM / I
2
S / SPDIF
Contents
BC358239A -ds-001Pb
Copyright CSR 2003
Advance Information
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Product Data Sheet
Contents
1
Key Features .................................................................................................................................................. 5
2
Device Pinout Diagram with 10 x 10 LFBGA Package ................................................................................ 6
3
Device Terminal Functions ........................................................................................................................... 7
4
Electrical Characteristics ............................................................................................................................ 11
5
Radio Characteristics .................................................................................................................................. 17
5.1
Transmitter Temperature +20C......................................................................................................... 17
5.2
Receiver Temperature +20C............................................................................................................. 18
5.3
Power Consumption .............................................................................................................................. 19
6
Device Diagram ............................................................................................................................................ 20
7
Description of Functional Blocks ............................................................................................................... 21
7.1
RF Receiver........................................................................................................................................... 21
7.1.1
Low Noise Amplifier ................................................................................................................... 21
7.1.2
Analogue to Digital Converter .................................................................................................... 21
7.2
RF Transmitter....................................................................................................................................... 21
7.2.1
IQ Modulator .............................................................................................................................. 21
7.2.2
Power Amplifier .......................................................................................................................... 21
7.2.3
Auxiliary DAC ............................................................................................................................. 21
7.3
RF Synthesiser ...................................................................................................................................... 21
7.4
Clock Input and Generation ................................................................................................................... 21
7.5
Baseband and Logic.............................................................................................................................. 22
7.5.1
Memory Management Unit......................................................................................................... 22
7.5.2
Burst Mode Controller ................................................................................................................ 22
7.5.3
Physical Layer Hardware Engine DSP....................................................................................... 22
7.5.4
RAM ........................................................................................................................................... 22
7.5.5
DSP RAM................................................................................................................................... 22
7.5.6
FLASH Memory.......................................................................................................................... 22
7.5.7
USB............................................................................................................................................ 23
7.5.8
Synchronous Serial Interface ..................................................................................................... 23
7.5.9
UART ......................................................................................................................................... 23
7.6
Microcontroller ....................................................................................................................................... 23
7.6.1
Programmable I/O...................................................................................................................... 23
7.7
DSP Co-Processor ................................................................................................................................ 23
7.8
Stereo Audio Interface........................................................................................................................... 24
7.8.1
PCM Interface ............................................................................................................................ 24
7.8.2
Audio Input................................................................................................................................. 24
7.8.3
Audio Output .............................................................................................................................. 25
7.8.4
Digital Audio Interface ................................................................................................................ 25
8
CSR Bluetooth Software Stacks ................................................................................................................. 26
8.1
BlueCore HCI Stack .............................................................................................................................. 26
8.1.1
Key Features of the HCI Stack - Standard Bluetooth Functionality............................................ 27
8.1.2
Key Features of the HCI Stack - Extra Functionality .................................................................. 29
8.2
BlueCore RFCOMM Stack..................................................................................................................... 30
8.2.1
Key Features of the BlueCore3-Multimedia RFCOMM Stack .................................................... 31
8.3
BlueCore Virtual Machine Stack ............................................................................................................ 32
8.4
BlueCore3-Multimedia and DSP Co-Processor Stack ........................................................................... 33
8.5
Host-Side Software................................................................................................................................ 33
8.6
Device Firmware Upgrade ..................................................................................................................... 33
8.7
Additional Software for Other Embedded Applications .......................................................................... 33
8.8
CSR Development Systems .................................................................................................................. 33
9
External Interfaces....................................................................................................................................... 34
9.1
Transmitter/Receiver Input and Output.................................................................................................. 34
Contents
BC358239A -ds-001Pb
Copyright CSR 2003
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Product Data Sheet
9.2
RF Plug `n' Go ....................................................................................................................................... 34
9.3
Asynchronous Serial Data Port (UART) and USB Port.......................................................................... 35
9.4
UART Bypass ........................................................................................................................................ 36
9.4.1
UART Configuration While RESET is Active.............................................................................. 36
9.4.2
UART Bypass Mode................................................................................................................... 36
9.5
Stereo Audio Interface........................................................................................................................... 36
9.5.1
PCM CODEC Interface .............................................................................................................. 37
9.5.2
Digital Audio Bus........................................................................................................................ 38
9.5.3
IEC 60958 Interface ................................................................................................................... 38
9.5.4
Audio Input Stage....................................................................................................................... 39
9.5.5
Microphone Input ....................................................................................................................... 40
9.5.6
Line Input ................................................................................................................................... 40
9.5.7
Output Stage.............................................................................................................................. 41
9.6
Serial Peripheral Interface ..................................................................................................................... 41
9.7
I/O Parallel Ports ................................................................................................................................... 41
9.7.1
PIO Defaults for BTv1.2 HCI Level Bluetooth Stack................................................................... 42
9.8
I
2
C Interface........................................................................................................................................... 42
9.9
TCXO Enable OR Function ................................................................................................................... 43
9.10
Reset ................................................................................................................................................... 43
9.11
Power Supply ........................................................................................................................................ 44
9.11.1
Voltage Regulator ...................................................................................................................... 44
9.11.2
Sequencing ................................................................................................................................ 44
9.11.3
Sensitivity to Disturbances ......................................................................................................... 44
10
Schematic ..................................................................................................................................................... 45
11
Package Dimensions ................................................................................................................................... 46
11.1
10 x 10 LFBGA 96-Ball LFBGA Package .............................................................................................. 46
12
Ordering Information ................................................................................................................................... 47
12.1
BlueCore3-Multimedia (Internal Flash) .................................................................................................. 47
13
Contact Information ..................................................................................................................................... 48
14
Document References ................................................................................................................................. 49
Acronyms and Definitions.................................................................................................................................. 50
Status Information .............................................................................................................................................. 52
Record of Changes ............................................................................................................................................. 53
List of Figures
Figure 2.1: BC358239A BlueCore3-Multimedia Device Pinout ............................................................................... 6
Figure 6.1: BlueCore3-Multimedia Device Diagram .............................................................................................. 20
Figure 7.1: DSP Interface to Internal Functions .................................................................................................... 23
Figure 7.2: Audio Stereo Interface ........................................................................................................................ 24
Figure 8.1: BlueCore HCI Stack ............................................................................................................................ 26
Figure 8.2: BlueCore RFCOMM Stack .................................................................................................................. 30
Figure 8.3: Virtual Machine ................................................................................................................................... 32
Figure 8.4: DSP Co-Processor Stack.................................................................................................................... 33
Figure 9.1: Circuit RF_IN ...................................................................................................................................... 34
Figure 9.2: Circuit for RF_CONNECT ................................................................................................................... 34
Figure 9.3: UART Bypass Architecture ................................................................................................................. 36
Figure 9.4: Stereo CODEC Audio Input and Output Stages.................................................................................. 37
Figure 9.5: Example Circuit for SPDIF Interface with Coaxial Output ................................................................... 38
Figure 9.6: Example Circuit for SPDIF Interface with Coaxial Input ...................................................................... 39
Figure 9.7: Example Circuit for SPDIF Interface with Optical Output .................................................................... 39
Contents
BC358239A -ds-001Pb
Copyright CSR 2003
Advance Information
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Product Data Sheet
Figure 9.8: Example Circuit for SPDIF Interface with Optical Input ....................................................................... 39
Figure 9.9: BlueCore3-Multimedia Microphone Biasing (Left Channel Shown)..................................................... 40
Figure 9.10: Differential Input (Left Channel Shown) ............................................................................................ 40
Figure 9.11: Single Ended Input (Left Channel Shown) ........................................................................................ 41
Figure 9.12: Speaker Output (Left Channel Shown) ............................................................................................. 41
Figure 9.13: Example TXCO Enable OR Function ................................................................................................ 43
Figure 10.1: Application Circuit for Radio Characteristics Specification with 10 x 10 LFBGA Package ................ 45
Figure 11.1: BlueCore3-Multimedia 96-Ball LFBGA Package Dimensions ........................................................... 46
List of Tables
Table 9.1: Alternative Functions of the Digital Audio Bus Interface on the PCM Interface .................................... 38
Table 9.2: PIO Defaults......................................................................................................................................... 42
Key Features
BC358239A -ds-001Pb
Copyright CSR 2003
Advance Information
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Product Data Sheet
1 Key
Features
Radio
Common TX/RX terminal simplifies external
matching; eliminates external antenna switch
BIST minimises production test time and no
external trimming required in production
Full RF reference designs available
Bluetooth v1.2 Specification compliant
Transmitter
+6dBm RF transmit power with level control from
on-chip 6-bit DAC over a dynamic range >30dB
Class 2 and Class 3 support without the need for
an external power amplifier or TX/RX switch
Class1 support using external power amplifier, a
power control terminal controlled by an internal
8-bit DAC and external RF TX/RX switch
Receiver
Integrated channel filters
Digital demodulator for improved sensitivity and
co-channel rejection
Real time digitised RSSI available on HCI interface
Fast AGC for enhanced dynamic range
Synthesiser
Fully integrated synthesiser; no external VCO,
varactor diode, resonator or loop filter
Compatible with crystals between 8 and 32MHz (in
multiples of 250kHz) or an external clock
Accepts 7.68, 14.44, 15.36, 16.2, 16.8, 19.2, 19.44,
19.68, 19.8 and 38.4MHz TCXO frequencies for
GSM and CDMA devices with sinusoidal or logic
level signals
Auxiliary Features
Crystal oscillator with built-in digital trimming
Power management includes digital shut down,
wake up commands and an integrated low power
oscillator for ultra-low power Park/Sniff/Hold mode
Can use external master oscillator and provides
`clock request signal' to control external clock
On-chip linear regulator; 1.8V output from a
2.2-4.2V input
Power-on-reset cell detects low supply voltage
Arbitrary power supply sequencing permitted
8-bit ADC and DAC available to applications
Package Options
96-ball LFBGA, 10 x 10 x 1.4mm, 0.8mm pitch
DSP Co-Processor
32MIPs, 24-bit fixed point DSP core
Single cycle MAC; 24 x 24-bit multiply and 56-bit
accumulator
32-bit instruction word, dual 24-bit data memory
4Kword program memory, 2 x 8Kword data
memory
Flexible interfaces to BlueCore3 subsystem
Baseband and Software
Internal 8Mbit Flash for complete system solution
Internal 32Kbyte RAM, allows full speed data
transfer, mixed voice and data, and full piconet
operation
Logic for forward error correction, header error
control, access code correlation, CRC,
demodulation, encryption bit stream generation,
whitening and transmit pulse shaping
Transcoders for A-law,
-law and linear voice from
host and A-law,
-law and CVSD voice over air
Physical Interfaces
Synchronous serial interface up to 4Mbaud for
system debugging
UART interface with programmable baud rate up to
1.5Mbaud with an optional bypass mode
Full speed USB v1.1 interface supports OHCI and
UHCI host interfaces
Stereo serial audio interface supporting PCM, I
2
S
and SPDIF formats
Optional I
2
CTM compatible interface
Stereo Audio CODEC
16-bit resolution, standard sample rates of 8kHz,
11.025kHz, 16kHz, 22.05kHz, 32kHz, 44.1kHz and
48kHz
Dual ADC and DAC for stereo audio
Integrated amplifiers for driving microphone and
speakers with minimum external components
Compatible with DSP co-processor
Bluetooth Stack
CSR's Bluetooth Protocol Stack runs on the on-chip
MCU in a variety of configurations:
Standard HCI (UART or USB)
Fully embedded RFCOMM
Customised builds with embedded application code
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