256/512/1K/2K/4K x 9 Asynchronous FIFO
CY7C419/21/25/29/33
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
Document #: 38-06001 Rev. **
Revised November 4, 1997
19/21/25/29/
Features
Asynchronous first-in first-out (FIFO) buffer memories
256 x 9 (CY7C419)
512 x 9 (CY7C421)
1K x 9 (CY7C425)
2K x 9 (CY7C429)
4K x 9 (CY7C433)
Dual-ported RAM cell
High-speed 50.0-MHz read/write independent of
depth/width
Low operating power: I
CC
= 35 mA
Empty and Full flags (Half Full flag in standalone)
TTL compatible
Retransmit in standalone
Expandable in width
PLCC, 7x7 TQFP, SOJ, 300-mil and 600-mil DIP
Pin compatible and functionally equivalent to IDT7200,
IDT7201, IDT7202, IDT7203, IDT7204, AM7200, AM7201,
AM7202, AM7203, and AM7204
Functional Description
The CY7C419, CY7C420/1, CY7C424/5, CY7C428/9, and
CY7C432/3 are first-in first-out (FIFO) memories offered in
600-mil wide and 300-mil wide packages. They are, respec-
tively, 256, 512, 1,024, 2,048, and 4,096 words by 9-bits wide.
Each FIFO memory is organized such that the data is read in
the same sequential order that it was written. Full and Empty
flags are provided to prevent overrun and underrun. Three ad-
ditional pins are also provided to facilitate unlimited expansion
in width, depth, or both. The depth expansion technique steers
the control signals from one device to another in parallel, thus
eliminating the serial addition of propagation delays, so that
throughput is not reduced. Data is steered in a similar manner.
The read and write operations may be asynchronous; each
can occur at a rate of 50.0 MHz. The write operation occurs
when the write (W) signal is LOW. Read occurs when read (R)
goes LOW. The nine data outputs go to the high-impedance
state when R is HIGH.
A Half Full (HF) output flag is provided that is valid in the stan-
dalone and width expansion configurations. In the depth ex-
pansion configuration, this pin provides the expansion out
(XO) information that is used to tell the next FIFO that it will be
activated.
In the standalone and width expansion configurations, a LOW
on the retransmit (RT) input causes the FIFOs to retransmit
the data. Read enable (R) and write enable (W) must both be
HIGH during retransmit, and then R is used to access the data.
The CY7C419, CY7C420, CY7C421, CY7C424, CY7C425,
CY7C428, CY7C429, CY7C432, and CY7C433 are fabricated
using an advanced 0.65-micron P-well CMOS technology. In-
put ESD protection is greater than 2000V and latch-up is pre-
vented by careful layout and guard rings.
CY7C419/21/25/29/33
Document #: 38-06001 Rev. **
Page 2 of 22
Maximum Rating
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................65
C to +150
C
Ambient Temperature with
Power Applied.............................................55
C to +125
C
Supply Voltage to Ground Potential ............... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State................................................0.5V to +7.0V
DC Input Voltage ............................................0.5V to +7.0V
Power Dissipation.......................................................... 1.0W
Output Current, into Outputs (LOW)............................ 20 mA
Static Discharge Voltage ........................................... >2000V
(per MILSTD883, Method 3015)
Latch-Up Current ..................................................... >200 mA
RAM ARRAY
256 x 9
512 x 9
1024x 9
2048x 9
4096x 9
Logic Block Diagram
Pin Configurations
1
2
3
4
5
6
7
8
9
10
11
12
15
16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
Top View
DIP
7C420/1
W
D
8
D
3
D
2
D
1
D
0
XI
FF
Q
0
Q
1
Q
2
GND
Vcc
D
4
FL/RT
MR
EF
XO/HF
Q
7
R
PLCC/LCC
Top View
Q
3
Q
8
D
5
D
6
D
7
Q
6
Q
5
Q
4
4 3 2 1 323130
14 15 1617 181920
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
FL/RT
MR
EF
XO/HF
Q
7
D
6
Q
6
D
7
NC
READ
CONTROL
WRITE
CONTROL
WRITE
POINTER
RESET
LOGIC
EXPANSION
LOGIC
DATA INPUTS
(D0D 8)
THREE-
STATE
BUFFERS
DATA OUTPUTS
(Q0Q 8)
W
READ
POINTER
FLAG
LOGIC
R
XI
EF
FF
XO/HF
MR
FL/RT
D
2
D
1
D
0
XI
FF
Q
0
Q
1
NC
Q
2
D
D
W
NC
V
D
D
3
8
cc
4
5
Q
Q
GND
NC
R
Q
Q
3
8
4
5
C4201
C4202
C4203
7C419
7C421/5/9
7C433
7C424/5
7C428/9
7C432/3
7C419
26
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9 10 11 12 13 14 15
32 3130 29 28 27
25
Q
1
XI
Q
0
D
1
D
0
NC
NC
FF
D
6
D
5
D
4
V
CC
W
D
8
D
3
D
2
D
7
FL/RT
NC
NC
MR
EF
XO/HF
Q
7
C4204
Top View
TQFP
Q
2
Q
3
Q
8
GND
R
Q
4
Q
5
Q
6
16
7C419
7C421/5/9
7C433
Selection Guide
256 x 9
7C41910
7C41915
7C41930
7C41940
512 x 9 (600-mil only)
7C42020
7C42025
7C42040
7C42065
512 x 9
7C42110
7C42115
7C42120
7C42125
7C42130
7C42140
7C42165
1K x 9 (600-mil only)
7C42420
7C42425
7C42430
7C42440
7C42465
1K x 9
7C42510
7C42515
7C42520
7C42525
7C42530
7C42540
7C42565
2K x 9 (600-mil only)
7C42820
7C42865
2K x 9
7C42910
7C42915
7C42920
7C42925
7C42930
7C42940
7C42965
4K x 9 (600-mil only)
7C43225
7C43240
4K x 9
7C43310
7C43315
7C43320
7C43325
7C43330
7C43340
7C43365
Frequency (MHz)
50
40
33.3
28.5
25
20
12.5
Maximum Access Time (ns)
10
15
20
25
30
40
65
I
CC1
(mA)
35
35
35
35
35
35
35
CY7C419/21/25/29/33
Document #: 38-06001 Rev. **
Page 3 of 22
Operating Range
Range
Ambient Temperature
[1]
V
CC
Commercial
0
C to + 70
C
5V
10%
Industrial
40
C to +85
C
5V
10%
Military
55
C to +125
C
5V
10%
Electrical Characteristics
Over the Operating Range
[2]
7C41910, 15, 30, 40
7C420/110, 15, 20, 25, 30, 40, 65
7C424/510, 15, 20, 25, 30, 40, 65
7C428/910, 15, 20, 25, 30, 40, 65
7C432/310, 15, 20, 25, 30, 40, 65
Parameter
Description
Test Conditions
Min.
Max.
Unit
V
OH
Output HIGH Voltage
V
CC
= Min., I
OH
= 2.0 mA
2.4
V
V
OL
Output LOW Voltage
V
CC
= Min., I
OL
= 8.0 mA
0.4
V
V
IH
Input HIGH Voltage
Com'l
2.0
V
CC
V
Mil/Ind
2.2
V
CC
V
IL
Input LOW Voltage
Note 3
0.8
V
I
IX
Input Leakage Current
GND < V
I
< V
CC
10
+10
A
I
OZ
Output Leakage Current
R > V
IH
, GND < V
O
< V
CC
10
+10
A
I
OS
Output Short Circuit Current
[4]
V
CC
= Max., V
OUT
= GND
90
mA
Electrical Characteristics
Over the Operating Range
[2]
(continued)
7C41910
7C42110
7C42510
7C42910
7C43310
7C41915
7C42115
7C42515
7C42915
7C43315
7C42020
7C42120
7C42420
7C42520
7C42820
7C42920
7C43320
7C42025
7C42125
7C42425
7C42525
7C42925
7C43225
7C43325
Parameter
Description
Test Conditions
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
I
CC
Operating Current
V
CC
= Max.,
I
OUT
= 0 mA
f = f
MAX
Com'l
85
65
55
50
mA
Mil/Ind
100
90
80
I
CC1
Operating Current
V
CC
= Max.,
I
OUT
= 0 mA
F = 20 MHz
Com'l
35
35
35
35
mA
I
SB1
Standby Current
All Inputs =
V
IH
Min.
Com'l
10
10
10
10
mA
Mil/Ind
15
15
15
I
SB2
Power-Down Current All Inputs >
V
CC
0.2V
Com'l
5
5
5
5
mA
Mil/Ind
8
8
8
Notes:
1.
T
A
is the "instant on" case temperature.
2.
See the last page of this specification for Group A subgroup testing information.
3.
V
IL
(Min.) = 2.0V for pulse durations of less than 20 ns.
4.
For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.
CY7C419/21/25/29/33
Document #: 38-06001 Rev. **
Page 4 of 22
Electrical Characteristics
Over the Operating Range
[2]
(continued)
7C41930
7C42130
7C42430
7C42530
7C42930
7C43330
7C41940
7C42040
7C42140
7C42440
7C42540
7C42940
7C43240
7C43340
7C42065
7C42165
7C42465
7C42565
7C42865
7C42965
7C43365
Parameter
Description
Test Conditions
Min.
Max.
Min.
Max.
Min.
Max.
Units
I
CC
Operating Current
V
CC
= Max.,
I
OUT
= 0 mA
f = f
MAX
Com'l
40
35
35
mA
Mil/Ind
75
70
65
I
CC1
Operating Current
V
CC
= Max.,
I
OUT
= 0 mA
F = 20 MHz
Com'l
35
35
35
mA
I
SB1
Standby Current
All Inputs =
V
IH
Min.
Com'l
10
10
10
mA
Mil
15
15
15
I
SB2
Power-Down Current
All Inputs >
V
CC
0.2V
Com'l
5
5
5
mA
Mil
8
8
8
Capacitance
[5]
Parameter
Description
Test Conditions
Max.
Unit
C
IN
Input Capacitance
T
A
= 25
C, f = 1 MHz,
V
CC
= 4.5V
6
pF
C
OUT
Output Capacitance
6
pF
Note:
5.
Tested initially and after any design or process changes that may affect these parameters.
AC Test Loads and Waveforms
3.0V
5V
OUTPUT
R1 500
R2
333
30 pF
INCLUDING
JIGAND
SCOPE
GND
90%
10%
90%
10%
3 ns
3 ns
5V
OUTPUT
R1 500
R2
333
5 pF
INCLUDING
JIGAND
SCOPE
OUTPUT
2V
Equivalent to:
TH VENIN EQUIVALENT
(b)
C4206
C4207
C4208
(a)
ALL INPUT PULSES
200
CY7C419/21/25/29/33
Document #: 38-06001 Rev. **
Page 5 of 22
Switching Characteristics
Over the Operating Range
[6, 7]
7C41910
7C42110
7C42510
7C42910
7C43310
7C41915
7C42115
7C42515
7C42915
7C43315
7C42020
7C42120
7C42420
7C42520
7C42820
7C42920
7C43320
7C42025
7C42125
7C42425
7C42525
7C42925
7C43225
7C43325
Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
t
RC
Read Cycle Time
20
25
30
35
ns
t
A
Access Time
10
15
20
25
ns
t
RR
Read Recovery Time
10
10
10
10
ns
t
PR
Read Pulse Width
10
15
20
25
ns
t
LZR
[5,8]
Read LOW to Low Z
3
3
3
3
ns
t
DVR
[8,9]
Data Valid After Read HIGH
5
5
5
5
ns
t
HZR
[5,8,9]
Read HIGH to High Z
15
15
15
18
ns
t
WC
Write Cycle Time
20
25
30
35
ns
t
PW
Write Pulse Width
10
15
20
25
ns
t
HWZ
[5,8]
Write HIGH to Low Z
5
5
5
5
ns
t
WR
Write Recovery Time
10
10
10
10
ns
t
SD
Data Set-Up Time
6
8
12
15
ns
t
HD
Data Hold Time
0
0
0
0
ns
t
MRSC
MR Cycle Time
20
25
30
35
ns
t
PMR
MR Pulse Width
10
15
20
25
ns
t
RMR
MR Recovery Time
10
10
10
10
ns
t
RPW
Read HIGH to MR HIGH
10
15
20
25
ns
t
WPW
Write HIGH to MR HIGH
10
15
20
25
ns
t
RTC
Retransmit Cycle Time
20
25
30
35
ns
t
PRT
Retransmit Pulse Width
10
15
20
25
ns
t
RTR
Retransmit Recovery Time
10
10
10
10
ns
Notes:
6.
Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V and output loading of the specified I
OL
/I
OH
and 30 pF load
capacitance, as in part (a) of AC Test Load and Waveforms, unless otherwise specified.
7.
See the last page of this specification for Group A subgroup testing information.
8.
t
HZR
transition is measured at +200 mV from V
OL
and 200 mV from V
OH
. t
DVR
transition is measured at the 1.5V level. t
HWZ
and t
LZR
transition is measured
at
100 mV from the steady state.
9.
t
HZR
and t
DVR
use capacitance loading as in part (b) of AC Test Load and Waveforms.
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