ChipFind - документация

Электронный компонент: DS1230YP-85-IND

Скачать:  PDF   ZIP
1 of 12
111899
FEATURES
10 years minimum data retention in the
absence of external power
Data is automatically protected during power
loss
Replaces 32k x 8 volatile static RAM,
EEPROM or Flash memory
Unlimited write cycles
Low-power CMOS
Read and write access times as fast as 70 ns
Lithium energy source is electrically
disconnected to retain freshness until power is
applied for the first time
Full
10% V
CC
operating range (DS1230Y)
Optional
5% V
CC
operating range
(DS1230AB)
Optional industrial temperature range of
-40
C to +85
C, designated IND
JEDEC standard 28-pin DIP package
New PowerCap Module (PCM) package
-
Directly surface-mountable module
-
Replaceable snap-on PowerCap provides
lithium backup battery
-
Standardized pinout for all nonvolatile
SRAM products
-
Detachment feature on PowerCap allows
easy removal using a regular screwdriver
PIN ASSIGNMENT
PIN DESCRIPTION
A0 - A14
- Address Inputs
DQ0 - DQ7
- Data In/Data Out
CE
- Chip Enable
WE
- Write Enable
OE
- Output Enable
V
CC
- Power (+5V)
GND -
Ground
NC
- No Connect
DS1230Y/AB
256k Nonvolatile SRAM
www.dalsemi.com
13
1
2
3
4
5
6
7
8
9
10
11
12
14
27
28-Pin ENCAPSULATED PACKAGE
740-mil EXTENDED
A14
A7
A5
A4
A3
A2
A1
A0
DQ1
DQ0
V
CC
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ5
DQ6
28
26
25
24
23
22
21
20
19
18
17
15
16
A12
A6
DQ2
GND
DQ4
DQ3
1
NC
2
3
NC
NC
NC
V
CC
WE
OE
CE
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
GND
4
5
6
7
8
9
10
11
12
13
14
15
16
17
NC
A14
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
34
NC
GND V
BAT
34-Pin POWERCAP MODULE (PCM)
(USES DS9034PC POWERCAP)
DS1230Y/AB
2 of 12
DESCRIPTION
The DS1230 256k Nonvolatile SRAMs are 262,144-bit, fully static, nonvolatile SRAMs organized as
32,768 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry
which constantly monitors V
CC
for an out-of-tolerance condition. When such a condition occurs, the
lithium energy source is automatically switched on and write protection is unconditionally enabled to
prevent data corruption. DIP-package DS1230 devices can be used in place of existing 32k x 8 static
RAMs directly conforming to the popular bytewide 28-pin DIP standard. The DIP devices also match the
pinout of 28256 EEPROMs, allowing direct substitution while enhancing performance. DS1230 devices
in the Low Profile Module package are specifically designed for surface-mount applications. There is no
limit on the number of write cycles that can be executed and no additional support circuitry is required for
microprocessor interfacing.
READ MODE
The DS1230 devices execute a read cycle whenever
WE
(Write Enable) is inactive (high) and
CE
(Chip
Enable) and
OE
(Output Enable) are active (low). The unique address specified by the 15 address inputs
(A
0
- A
14
) defines which of the 32,768 bytes of data is to be accessed. Valid data will be available to the
eight data output drivers within t
ACC
(Access Time) after the last address input signal is stable, providing
that
CE
and
OE
(Output Enable) access times are also satisfied. If
OE
and
CE
access times are not
satisfied, then data access must be measured from the later-occurring signal (
CE
or
OE
) and the limiting
parameter is either t
CO
for
CE
or t
OE
for
OE
rather than address access.
WRITE MODE
The DS1230 devices execute a write cycle whenever the
WE
and
CE
signals are active (low) after
address inputs are stable. The later-occurring falling edge of
CE
or
WE
will determine the start of the
write cycle. The write cycle is terminated by the earlier rising edge of
CE
or
WE
. All address inputs must
be kept valid throughout the write cycle.
WE
must return to the high state for a minimum recovery time
(t
WR
) before another cycle can be initiated. The
OE
control signal should be kept inactive (high) during
write cycles to avoid bus contention. However, if the output drivers are enabled (
CE
and
OE
active) then
WE
will disable the outputs in t
ODW
from its falling edge.
DATA RETENTION MODE
The DS1230AB provides full functional capability for V
CC
greater than 4.75 volts and write protects by
4.5 volts. The DS1230Y provides full functional capability for V
CC
greater than 4.5 volts and write
protects by 4.25 volts. Data is maintained in the absence of V
CC
without any additional support circuitry.
The nonvolatile static RAMs constantly monitor V
CC
. Should the supply voltage decay, the NV SRAMs
automatically write protect themselves, all inputs become "don't care," and all outputs become high-
impedance. As V
CC
falls below approximately 3.0 volts, a power switching circuit connects the lithium
energy source to RAM to retain data. During power-up, when V
CC
rises above approximately 3.0 volts
the power switching circuit connects external V
CC
to RAM and disconnects the lithium energy source.
Normal RAM operation can resume after V
CC
exceeds 4.75 volts for the DS1230AB and 4.5 volts for the
DS1230Y.
FRESHNESS SEAL
Each DS1230 device is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When V
CC
is first applied at a level greater than 4.25 volts, the lithium
energy source is enabled for battery back-up operation.
DS1230Y/AB
3 of 12
PACKAGES
The DS1230 devices are available in two packages: 28-pin DIP and 34-pin PowerCap Module (PCM).
The 28-pin DIP integrates a lithium battery, an SRAM memory and a nonvolatile control function into a
single package with a JEDEC-standard, 600-mil DIP pinout. The 34-pin PowerCap Module integrates
SRAM memory and nonvolatile control along with contacts for connection to the lithium battery in the
DS9034PC PowerCap. The PowerCap Module package design allows a DS1230 PCM device to be
surface mounted without subjecting its lithium backup battery to destructive high-temperature reflow
soldering. After a DS1230 PCM is reflow soldered, a DS9034PC PowerCap is snapped on top of the
PCM to form a complete Nonvolatile SRAM module. The DS9034PC is keyed to prevent improper
attachment. DS1230 PowerCap Modules and DS9034PC PowerCaps are ordered separately and shipped
in separate containers. See the DS9034PC data sheet for further information.
ABSOLUTE MAXIMUM RATINGS*
Voltage on Any Pin Relative to Ground
-0.3V to +7.0V
Operating Temperature
0C to 70C, -40C to +85C for IND parts
Storage Temperature
-40C to +70C, -40C to +85C for IND parts
Soldering Temperature
260C for 10 seconds
*
This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS (t
A
: See Note 10)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS NOTES
DS1230AB Power Supply Voltage
V
CC
4.75
5.0
5.25
V
DS1230Y Power Supply Voltage
V
CC
4.5
5.0
5.5
V
Logic 1
V
IH
2.2
V
CC
V
Logic 0
V
IL
0.0
0.8
V
DC ELECTRICAL (V
CC
=5V
=
5% for DS1230AB)
CHARACTERISTICS (t
A
: See Note 10) (V
CC
=5V
=
10% for DS1230Y)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS NOTES
Input Leakage Current
I
IL
-1.0
+1.0
A
I/O Leakage Current
CE
V
IH
V
CC
I
IO
-1.0
+1.0
A
Output Current @ 2.4V
I
OH
-1.0
mA
Output Current @ 0.4V
I
OL
2.0
mA
Standby Current
CE
=2.2V
I
CCS1
5.0
10.0
mA
Standby Current
CE
=V
CC
-0.5V
I
CCS2
3.0
5.0
mA
Operating Current
I
CCO1
85
mA
Write Protection Voltage (DS1230AB)
V
TP
4.50
4.62
4.75
V
Write Protection Voltage (DS1230Y)
V
TP
4.25
4.37
4.5
V
DS1230Y/AB
4 of 12
CAPACITANCE (t
A
=25
C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS NOTES
Input Capacitance
C
IN
5
10
pF
Input/Output Capacitance
C
I/O
5
10
pF
AC ELECTRICAL (V
CC
=5V
=
5% for DS1230AB)
CHARACTERISTICS (t
A
: See Note 10) (V
CC
=5V
=
10% for DS1230Y)
DS1230AB-70
DS1230Y-70
DS1230AB-85
DS1230Y-85
DS1230AB-100
DS1230Y-100
PARAMETER SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
UNITS NOTES
Read Cycle
Time
t
RC
70
85
100
ns
Access Time
t
ACC
70
85
100
ns
OE
to Output
Valid
t
OE
35
45
50
ns
CE
to Output
Valid
t
CO
70
85
100
ns
OE
or
CE
to
Output Active
t
COE
5
5
5
ns
5
Output High Z
from
Deselection
t
OD
25
30
35
ns
5
Output Hold
from Address
Change
t
OH
5
5
5
ns
Write Cycle
Time
t
WC
70
85
100
ns
Write Pulse
Width
t
WP
55
65
75
ns
3
Address Setup
Time
t
AW
0
0
0
ns
Write Recovery
Time
t
WR1
t
WR2
5
15
5
15
5
15
ns
12
13
Output High Z
from
WE
t
ODW
25
30
35
ns
5
Output Active
from
WE
t
OEW
5
5
5
ns
5
Data Setup
Time
t
DS
30
35
40
ns
4
Data Hold
Time
t
DH1
t
DH2
0
10
0
10
0
10
ns
12
13
DS1230Y/AB
5 of 12
AC ELECTRICAL CHARACTERISTICS (cont'd)
DS1230AB-120
DS1230Y-120
DS1230AB-150
DS1230Y-150
DS1230AB-200
DS1230Y-200
PARAMETER SYMBOL
MIN
MAX
MIN
MAX
MIN
MAX
UNITS NOTES
Read Cycle
Time
t
RC
120
150
200
ns
Access Time
t
ACC
120
150
200
ns
OE
to Output
Valid
t
OE
60
70
100
ns
CE
to Output
Valid
t
CO
120
150
200
ns
OE
or
CE
to
Output Active
t
COE
5
5
5
ns
5
Output High Z
from
Deselection
t
OD
35
35
35
ns
5
Output Hold
from Address
Change
t
OH
5
5
5
ns
Write Cycle
Time
t
WC
120
150
200
ns
Write Pulse
Width
t
WP
90
100
100
ns
3
Address Setup
Time
t
AW
0
0
0
ns
Write Recovery
Time
t
WR1
t
WR2
5
15
5
15
5
15
ns
12
13
Output High Z
from
WE
t
ODW
35
35
35
ns
5
Output Active
from
WE
t
OEW
5
5
5
ns
5
Data Setup
Time
t
DS
50
60
80
ns
4
Data Hold Time
t
DH1
t
DH2
0
10
0
10
0
10
ns
12
13