ADS-119

12-Bit, 10MHz, Low-Power

Sampling A/D Converters

Figure 1. ADS-119 Functional Block Diagram

DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.)

Tel: (508) 339-3000 Fax: (508) 339-6356

For immediate assistance: (800) 233-2765

FEATURES

12-bit resolution

10MHz minimum sampling rate

Functionally complete

Small 24-pin DDIP or SMT package

Requires only ±5V supplies

Low-power, 1.8 Watts

Outstanding dynamic performance

Edge-triggered

No missing codes over temperature

Ideal for both time and frequency-domain applications

GENERAL DESCRIPTION

The ADS-119 is a high-performance, 12-bit, 10MHz sampling
A/D converter. The device samples input signals up to Nyquist
frequencies with no missing codes. The ADS-119 features
excellent dynamic performance including a typical SNR of
69dB.

Packaged in a metal-sealed, ceramic, 24-pin DDIP, the
functionally complete ADS-119 contains a fast-settling sample/
hold amplifier, a subranging (two-pass) A/D converter, a
precise voltage reference, timing/control logic, and error-
correction circuitry. All timing and control logic operates from
the rising edge of a single start convert pulse. Digital input and
output levels are TTL.

Requiring only ±5V supplies, the ADS-119 typically dissipates
1.8 Watts. The unit offers a bipolar input range of ±1.5V.
Models are available for use in either commercial (0 to +70°C)
or military (55 to +125°C) operating temperature ranges.

INPUT/OUTPUT CONNECTIONS

PIN

FUNCTION

PIN

FUNCTION

BIT 12 (LSB)

NO CONNECT

BIT 11

ANALOG GROUND

BIT 10

NO CONNECT

BIT 9

+5V ANALOG SUPPLY

BIT 8

5V SUPPLY

BIT 7

ANALOG INPUT

BIT 6

ANALOG GROUND

BIT 5

OFFSET ADJUST

BIT 4

START CONVERT

BIT 3

DATA VALID

BIT 2

DIGITAL GROUND

BIT 1

+5V DIGITAL SUPPLY

Typical applications include signal analysis, medical/graphic
imaging, process control, ATE, radar, and sonar.

REF

DAC

I
S

12 BIT 1 (MSB)

11 BIT 2

10 BIT 3

9 BIT 4

8 BIT 5

7 BIT 6

6 BIT 7

5 BIT 9

4 BIT 9

3 BIT 10

2 BIT 11

1 BIT 12 (LSB)

TIMING AND

CONTROL LOGIC

OFFSET ADJUST 17

ANALOG INPUT 19

START CONVERT 16

DATA VALID 15

S/H

BUFFER

I
G

I
T

I
O

I
C

FLASH

ADC

FLASH

ADC

AMP

+5V ANALOG

SUPPLY

5V SUPPLY

18, 23

ANALOG

GROUND

+5V DIGITAL

SUPPLY

DIGITAL

GROUND

22, 24

NO CONNECT

ADS-119

+25°C

0 to +70°C

55 to +125°C

ANALOG INPUT

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

UNITS

Input Voltage Range

±1.5

Volts

Input Resistance

300

350

300

350

300

350

Input Capacitance

DIGITAL INPUT

Logic Levels

Logic "1"

+2.0

Volts

Logic "0"

+0.8

Volts

Logic Loading "1"

+20

µA

Logic Loading "0"

µA

Start Convert Positive Pulse Width

STATIC PERFORMANCE

Resolution

Bits

Integral Nonlinearity (f

= 10kHz)

±0.75

±1.0

±1.5

LSB

Differential Nonlinearity (f

= 10kHz)

±0.5

±0.95

0.95

±0.5

0.95

±0.75

+1.25

LSB

Full Scale Absolute Accuracy

±0.2

±0.5

±0.75

±1.5

%FSR

Bipolar Zero Error (Tech Note 2)

±0.2

±0.6

±0.3

±0.7

±0.6

±1.0

Unipolar Offset Error (Tech Note 2)

±0.1

±0.6

±0.3

±0.7

±1.5

%FSR

Gain Error (Tech Note 2)

±0.1

±0.5

±1.0

±2.5

No Missing Codes (f

= 10kHz)

Bits

DYNAMIC PERFORMANCE

Peak Harmonics (0.5dB)

dc to 1MHz

1MHz to 2.5MHz

2.5MHz to 5MHz

Total Harmonic Distortion (0.5dB)

dc to 1MHz

1MHz to 2.5MHz

2.5MHz to 5MHz

Signal-to-Noise Ratio

(w/o distortion, 0.5dB)
dc to 1MHz

1MHz to 2.5MHz

2.5MHz to 5MHz

Signal-to-Noise Ratio

(& distortion, 0.5dB)
dc to 1MHz

1MHz to 2.5MHz

2.5MHz to 5MHz

Two-tone Intermodulation

Distortion (f

= 100kHz,

240kHz, f

= 1MHz, 0.5dB)

Noise

250

300

400

µVrms

Input Bandwidth (3dB)

Small Signal (20dB input)

MHz

Large Signal (0dB input)

MHz

Feedthrough Rejection (f

= 5MHz)

Slew Rate

±400

V/µs

Aperture Delay Time

Aperture Uncertainty

ps rms

S/H Aquisition Time

(to ±0.01%FSR, 3V step)

Overvoltage Recovery Time

100

A/D Conversion Rate

500

MHz

ABSOLUTE MAXIMUM RATINGS

PARAMETERS

LIMITS

UNITS

+5V Supply (Pin 13, 21)

0 to +6

Volts

5V Supply (Pin 20)

0 to 6

Volts

Digital Input (Pin 16)

0.3 to +V

+0.3

Volts

Analog Input (Pin 19)

±5

Volts

Lead Temp (10 seconds)

+300

°C

PHYSICAL/ENVIRONMENTAL

PARAMETERS

MIN.

TYP.

MAX.

UNITS

Operating Temp. Range, Case

ADS-119MC/GC

+70

°C

ADS-119MM/GM/883

+125

°C

Thermal Impedance

°C/Watt

Storage Temperature

+150

°C

Package Type

24-pin, metal-sealed, ceramic DDIP or SMIT

Weight

0.42 ounces (12 grams)

FUNCTIONAL SPECIFICATIONS

= +25°C, ±V

= ±5V, 10mHz sampling rate, and a minimum

3 minute warmup unless otherwise specified.)

ADS-119

+25°C

0 to +70°C

55 to +125°C

DIGITAL OUTPUTS

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

UNITS

Logic Levels

Logic "1"

+2.4

Volts

Logic "0"

+0.4

Volts

Logic Loading "1"

Logic Loading "0"

Output Coding

Offset Binary

POWER REQUIREMENTS

Power Supply Ranges

+5V Supply

+4.75

+5.0

+5.25

+4.75

+5.0

+5.25

+4.9

+5.0

+5.25

Volts

5V Supply

4.75

5.0

5.25

4.75

5.0

5.25

4.9

5.0

5.25

Volts

Power Supply Current

+5V Supply

+200

+215

+200

+215

+200

+215

5V Supply

180

205

180

205

180

205

Power Dissipation

1.8

2.1

1.8

2.1

1.8

2.1

Watts

Power Supply Rejection

±0.01

%FSR/%V

Figure 2. ADS-119 Timing Diagram

6.02

(SNR + Distortion) 1.76 + 20 log

Full Scale Amplitude

Actual Input Amplitude

Effective bits is equal to:

This is the time required before the A/D output data is valid after the analog input
is back within the specified range.

Footnotes:

All power supplies must be on before applying a start convert pulse. All supplies
and the clock (START CONVERT) must be present during warmup periods. The
device must be continuously converting during this time. There is slight
degradation in performance when using ±12V supplies.

See ordering information for availability of ±5V input range. Contact DATEL for
availability of other input voltage ranges.

A 200ns wide start convert pulse is used for all production testing. Only the rising
edge of the start convert pulse is required for the device to operate
(edge-triggered).

TECHNICAL NOTES

1. Obtaining fully specified performance from the ADS-119

requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For optimal
performance, tie all ground pins (14, 18, and 23) directly to
a large analog ground plane beneath the package.

Bypass all power supplies to ground with 4.7µF tantalum
capacitors in parallel with 0.1µF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.

2. The ADS-119 achieves its specified accuracies without the

need for external calibration. If required, the device's small

initial offset and gain errors can be reduced to zero using
the adjustment circuitry shown in Figures 3 and 4. For
operation without adjustment, tie pin 17 to analog ground.
When using this circuitry, or any similar offset and gain-
calibration hardware, make adjustments following warmup.
To avoid interaction, always adjust offset before gain.

3. Applying a start convert pulse while a conversion is in

progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle.

4. Data is valid only for the time period (55ns, typical) shown in

Figure 2 even if the device is sampling at less than 10MHz.

START

CONVERT

DATA

INTERNAL S/H

N+1

DATA N-1 VALID

55ns typ.

50ns typ.

Acquisition Time

30ns min.

35ns typ.

37ns max.

Hold

65ns typ.

10ns typ.

DATA N VALID

INVALID DATA

45ns typ.

Scale is approximately 5ns per division.

INTERNAL EOC

15ns typ.

Conversion Time

DATA

VALID

40ns typ.

±5ns

35ns typ.

INVALID DATA

10ns typ.

INVALID DATA

Hold

40ns typ.

±5ns

60ns typ.

72ns min.

80ns typ.

83ns max.

20ns typ.

ADS-119

Figure 4. Typical Connection Diagram

CALIBRATION PROCEDURE
(Refer to Figures 3 and 4, Table 1)

Any offset and/or gain calibration procedures should not be
implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuits in Figure 3 and 4 are guaranteed to
compensate for the ADS-119's initial accuracy errors and may
not be able to compensate for additional system errors.

A/D converters are calibrated by positioning their digital outputs
exactly on the transition point between two adjacent digital
output codes. This can be accomplished by connecting LED's
to the digital outputs and adjusting until certain LED's "flicker"
equally between on and off. Other approaches employ digital
comparators or microcontrollers to detect when the outputs
change from one code to the next.

Offset adjusting for the ADS-119 is normally accomplished at
the point where the MSB is a 1 and all other output bits are 0's
and the LSB just changes from a 0 to a 1. This digital output
transition ideally occurs when the applied analog input is
+½ LSB (+366µV).

Gain adjusting is accomplished when all bits are 1's and the
LSB just changes from a 1 to a 0. This transition ideally occurs
when the analog input is at +full scale minus 1 ½ LSB's
(+1.4989V).

Zero/Offset Adjust Procedure

1. Apply a train of pulses to the START CONVERT input

(pin 16) so the converter is continuously converting.

2. Apply +366µV to the ANALOG INPUT (pin 19).

3. Adjust the offset potentiometer until the output bits are

1000 0000 0000 and the LSB flickers between 0 and 1.

Gain Adjust Procedure

1. Apply +1.4989V to the ANALOG INPUT (pin 19).

2. Adjust the gain potentiometer until all output bits are 1's and

the LSB flickers between 1 and 0.

3. To confirm proper operation of the device, vary the input

signal to obtain the output coding listed in Table 1.

+FS1 LSB

+1.49927V

1111 1111 1111

+3/4 FS

+1.12500V

1110 0000 0000

+1/2 FS

+0.75000V

1100 0000 0000

0.00000V

1000 0000 0000

1/2 FS

0.75000V

0100 0000 0000

3/4 FS

1.12500V

0010 0000 0000

FS +1 LSB

1.49927V

0000 0000 0001

1.50000V

0000 0000 0000

BIPOLAR

ADS-119

OUTPUT CODING

SCALE

INPUT VOLTAGE

OFFSET BINARY

(±1.5V RANGE)

MSB

LSB

Table 1. Output Coding for Bipolar Operation

To Pin 19
of ADS-119

15V

SIGNAL

INPUT

GAIN

ADJUST

1.98k

+15V

Figure 3. Optional Calibration Circuit, ADS-119

0.1µF

4.7µF

13, 20

18, 20

ADS-119

20k

+5V

BIT 1 (MSB)

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 8

BIT 9

BIT 10

BIT 11

BIT 12 (LSB)

DATA VALID

ANALOG INPUT

START CONVERT

A single +5V supply should be used for both the +5V analog and +5V digital.
If separate supplies are used, the difference between the two cannot exceed 100mV.

OFFSET

ADJUST

ADS-119

2MF

.01MF

20MHY

2MF

20MHY

2MF

20MHY

2MF

01MF

20MHY

74HCT573

20MHY

2MF

20MHY

2MF

01MF

20MHY

2MF

20K

98K

74HCT86

TIONAL

TION

1MF

TION

.1MF

1MF

500

74HCT86

1MF

2MF

OFFSET

119

20K

74HCT573

7MF

ANA

L
OG

INPUT

+5VA

-5VA

+15V

-15V

STA

(LSB

)

(MSB)

CONVERT

+5VD

TRIG

+5VA

ENA

BLE

-5V

DGND

ANA

I
N

P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1
P1

+5VA

C14

L7,

JPR2

+15V

C13

-15V

C12

-5VA

C11

+5V

C10

+5VF

-5V

P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2
P2

C20

C19

C18

C21

+5VF

JPR3

C15

+5VF

JPR4

C16

C17

119

+5V

-5V

+5V

+5VF

JPR5

JPR6

JPR1

ADS

-
11

8/11

C22

FOR AD

S-

119 10MHZ

FOR A

-
1
18/1

18A

5MHZ

118

119

118

BETWEEN THESE TWO POINTS.

AN OP

TION,

XIA

L
CAB

L
E

E NOTE

2
1

ARE GATES

L RES

I
STORS

ARE

IN OHMS

C1-C6

ARE

20V

ALL

CAPACITORS ARE

50V

UNL

ESS

OTHERWISE

ECIFI

NOTES:

119

118

01MF

Figure 5.

ADS-119 Ev

aluation Boar

d Sc

hematic

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