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Электронный компонент: ADS-917GM

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ADS-917
14-Bit, 1MHz, Low-Power
Sampling A/D Converters
Figure 1. ADS-917 Functional Block Diagram
FEATURES
14-bit resolution
1MHz sampling rate
Functionally complete; No missing codes
Edge-triggered; No pipeline delays
Small 24-pin DDIP or SMT package
Low power, 1.9 Watts maximum
Operates from 15V or 12V supplies
Unipolar 0 to +10V input range
GENERAL DESCRIPTION
The ADS-917 is a high-performance, 14-bit, 1MHz sampling
A/D converter. This device samples input signals up to Nyquist
frequencies with no missing codes. The ADS-917 features
outstanding dynamic performance including a THD of 80dB.
Housed in a small 24-pin DDIP or SMT (gull-wing) package,
the functionally complete ADS-917 contains a fast-settling
sample-hold amplifier, a subranging (two-pass) A/D converter,
a precise voltage reference, timing/control logic, and error-
correction circuitry. Digital input and output levels are TTL.
Requiring 15V (or 12V) and +5V supplies, the ADS-917
dissipates 1.9W (1.6W for 12V) maximum. The unit is offered
with a unipolar input (0 to +10V). Models are available for use
in either commercial (0 to +70C) or military (55 to +125C)
operating temperature ranges. Applications include radar,
sonar, spectrum analysis, and graphic/medical imaging.
INPUT/OUTPUT CONNECTIONS
PIN
FUNCTION
PIN
FUNCTION
1
BIT 14 (LSB)
24
12V/15V SUPPLY
2
BIT 13
23
ANALOG GROUND
3
BIT 12
22
+12V/+15V SUPPLY
4
BIT 11
21
+10V REFERENCE OUT
5
BIT 10
20
ANALOG INPUT
6
BIT 9
19
ANALOG GROUND
7
BIT 8
18
BIT 1 (MSB)
8
BIT 7
17
BIT 2
9
BIT 6
16
START CONVERT
10
BIT 5
15
EOC
11
BIT 4
14
DIGITAL GROUND
12
BIT 3
13
+5V SUPPLY
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.)
Tel: (508) 339-3000 Fax: (508) 339-6356
For immediate assistance: (800) 233-2765
REF
R
E
G
I
S
T
E
R
R
E
G
I
S
T
E
R
18 BIT 1 (MSB)
17 BIT 2
12 BIT 3
11 BIT 4
10 BIT 5
9 BIT 6
8 BIT 7
7 BIT 8
6 BIT 9
5 BIT 10
4 BIT 11
3 BIT 12
2 BIT 13
1 BIT 14 (LSB)
TIMING AND
CONTROL LOGIC
+10V REF. OUT 21
START CONVERT 16
EOC 15
D
I
G
I
T
A
L

C
O
R
R
E
C
T
I
O
N

L
O
G
I
C
DAC
FLASH
ADC
BUFFER
+
S/H
ANALOG INPUT 20
13
+5V SUPPLY
22
+12V/+15V SUPPLY
19, 23
ANALOG GROUND
14
DIGITAL GROUND
24
12V/15V SUPPLY
S
2
S
1
ADS-917
2
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
LIMITS
UNITS
+12V/+15V Supply (Pin 22)
0 to +16
Volts
12V/15V Supply (Pin 24)
0 to 16
Volts
+5V Supply (Pin 13)
0 to +6
Volts
Digital Input (Pin 16)
0.3 to +V
DD
+0.3
Volts
Analog Input (Pin 20)
4 to +17
Volts
Lead Temperature (10 seconds)
+300
C
PHYSICAL/ENVIRONMENTAL
PARAMETERS
MIN.
TYP.
MAX.
UNITS
Operating Temp. Range, Case
ADS-917MC, GC
0
--
+70
C
ADS-917MM, GM
55
--
+125
C
Thermal Impedance
j
c
6
C/Watt
ca
24
C/Watt
Storage Temperature
65
--
+150
C
Package Type
24-pin, metal-sealed, ceramic DDIP or SMT
Weight
0.42 ounces (12 grams)
+25C
0 to +70C
55 to +125C
ANALOG INPUT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
UNITS
Input Voltage Range
--
0 to +10
--
--
0 to +10
--
--
0 to +10
--
Volts
Input Resistance
--
1
--
--
1
--
--
1
--
k
Input Capacitance
--
7
15
--
7
15
--
7
15
pF
DIGITAL INPUT
Logic Levels
Logic "1"
+2.0
--
--
+2.0
--
--
+2.0
--
--
Volts
Logic "0"
--
--
+0.8
--
--
+0.8
--
--
+0.8
Volts
Logic Loading "1"
--
--
+20
--
--
+20
--
--
+20
A
Logic Loading "0"
--
--
20
--
--
20
--
--
20
A
Start Convert Positive Pulse Width
20
200
--
20
200
--
20
200
--
ns
STATIC PERFORMANCE
Resolution
--
14
--
--
14
--
--
14
--
Bits
Integral Nonlinearity (f
in
= 10kHz)
--
0.5
--
--
0.75
--
--
1.5
--
LSB
Differential Nonlinearity (f
in
= 10kHz)
--
0.5
0.95
--
0.5
0.95
0.95
0.75
+1.25
LSB
Full Scale Absolute Accuracy
--
0.05
0.1
--
0.1
0.2
--
0.15
0.4
%FSR
Unipolar Offset Error (Tech Note 2)
--
0.1
0.2
--
0.1
0.2
--
0.15
0.4
%FSR
Gain Error (Tech Note 2)
--
0.1
0.25
--
0.1
0.25
--
0.25
0.4
%
No Missing Codes (f
in
= 10kHz)
14
--
--
14
--
--
14
--
--
Bits
DYNAMIC PERFORMANCE
Peak Harmonics (0.5dB)
dc to 100kHz
--
87
82
--
87
82
--
85
80
dB
100kHz to 500kHz
--
81
76
--
81
76
--
79
74
dB
Total Harmonic Distortion (0.5dB)
dc to 100kHz
--
85
82
--
85
82
--
84
80
dB
100kHz to 500kHz
--
80
76
--
80
76
--
79
74
dB
Signal-to-Noise Ratio
(w/o distortion, 0.5dB)
dc to 100kHz
75
79
--
75
79
--
73
77
--
dB
100kHz to 500kHz
73
78
--
73
78
--
72
76
--
dB
Signal-to-Noise Ratio
(& distortion, 0.5dB)
dc to 100kHz
74
77
--
74
77
--
72
76
--
dB
100kHz to 500kHz
72
76
--
72
76
--
71
75
--
dB
Two-Tone Intermodulation
Distortion (f
in
= 100kHz,
240kHz, f
s
= 1MHz, 0.5dB)
--
87
--
--
86
--
--
85
--
dB
Noise
--
300
--
--
400
--
--
600
--
Vrms
Input Bandwidth (3dB)
Small Signal (20dB input)
--
7
--
--
7
--
--
7
--
MHz
Large Signal (0.5dB input)
--
5
--
--
5
--
--
5
--
MHz
Feedthrough Rejection (f
in
= 500kHz)
--
84
--
--
84
--
--
84
--
dB
Slew Rate
--
60
--
--
60
--
--
60
--
V/s
Aperture Delay Time
--
20
--
--
20
--
--
20
--
ns
Aperture Uncertainty
--
5
--
--
5
--
--
5
--
ps rms
S/H Acquisition Time
(to 0.003%FSR, 10V step)
530
570
610
530
570
610
530
570
610
ns
Overvoltage Recovery Time
--
400
1000
--
400
1000
--
400
1000
ns
A/D Conversion Rate
1
--
--
1
--
--
1
--
--
MHz
FUNCTIONAL SPECIFICATIONS
(T
A
= +25C, V
CC
= 15V (or 12V), +V
DD
= +5V, 1MHz sampling rate, and a minimum 1 minute warmup unless otherwise specified.)
ADS-917
3
+25C
0 to +70C
55 to +125C
ANALOG OUTPUT
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
UNITS
Internal Reference
Voltage
+9.95
+10.0
+10.05
+9.95
+10.0
+10.05
+9.95
+10.0
+10.05
Volts
Drift
--
5
--
--
5
--
--
5
--
ppm/C
External Current
--
--
1.5
--
--
1.5
--
--
1.5
mA
DIGITAL OUTPUTS
Logic Levels
Logic "1"
+2.4
--
--
+2.4
--
--
+2.4
--
--
Volts
Logic "0"
--
--
+0.4
--
--
+0.4
--
--
+0.4
Volts
Logic Loading "1"
--
--
4
--
--
4
--
--
4
mA
Logic Loading "0"
--
--
+4
--
--
+4
--
--
+4
mA
Delay, Falling Edge of EOC
to Output Data Valid
--
--
35
--
--
35
--
--
35
ns
Output Coding
Straight Binary
POWER REQUIREMENTS, 15V
Power Supply Ranges
+15V Supply
+14.5
+15.0
+15.5
+14.5
+15.0
+15.5
+14.5
+15.0
+15.5
Volts
15V Supply
14.5
15.0
15.5
14.5
15.0
15.5
14.5
15.0
15.5
Volts
+5V Supply
+4.75
+5.0
+5.25
+4.75
+5.0
+5.25
+4.75
+5.0
+5.25
Volts
Power Supply Currents
+15V Supply
--
+50
+65
--
+50
+65
--
+50
+65
mA
15V Supply
--
41
50
--
41
50
--
41
50
mA
+5V Supply
--
+70
+85
--
+70
+85
--
+70
+85
mA
Power Dissipation
--
1.7
1.9
--
1.7
1.9
--
1.7
1.9
Watts
Power Supply Rejection
--
--
0.01
--
--
0.01
--
--
0.01
%FSR/%V
POWER REQUIREMENTS, 12V
Power Supply Ranges
+12V Supply
+11.5
+12.0
+12.5
+11.5
+12.0
+12.5
+11.5
+12.0
+12.5
Volts
12V Supply
11.5
12.0
12.5
11.5
12.0
12.5
11.5
12.0
12.5
Volts
+5V Supply
+4.75
+5.0
+5.25
+4.75
+5.0
+5.25
+4.75
+5.0
+5.25
Volts
Power Supply Currents
+12V Supply
--
+50
+65
--
+50
+65
--
+50
+65
mA
12V Supply
--
40
48
--
40
48
--
40
48
mA
+5V Supply
--
+70
+80
--
+70
+80
--
+70
+80
mA
Power Dissipation
--
1.4
1.6
--
1.4
1.6
--
1.4
1.6
Watts
Power Supply Rejection
--
--
0.01
--
--
0.01
--
--
0.01
%FSR/%V
Footnotes:
All power supplies must be on before applying a start convert pulse. All supplies
and the clock (START CONVERT) must be present during warmup periods. The
device must be continuously converting during this time. There is a slight
degradation in performance when using 12V supplies.
See Ordering Information for availability of 5V input range. Contact DATEL for
availability of other input voltage ranges.
A 1MHz clock with a 200ns wide start convert pulse is used for all production
testing. See Timing Diagram for more details.
6.02
(SNR + Distortion) 1.76 + 20 log
Full Scale Amplitude
Actual Input Amplitude
Effective bits is equal to:
This is the time required before the A/D output data is valid after the analog input
is back within the specified range.
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-917
requires careful attention to pc-card layout and power
supply decoupling. The device's analog and digital ground
systems are connected to each other internally. For optimal
performance, tie all ground pins (14, 19 and 23) directly to a
large analog ground plane beneath the package.
Bypass all power supplies, as well as the REFERENCE
OUTPUT (pin 21), to ground with 4.7F tantalum capacitors
in parallel with 0.1F ceramic capacitors. Locate the
bypass capacitors as close to the unit as possible. If the
user-installed offset and gain adjusting circuit shown in
Figure 2 is used, also locate it as close to the ADS-917 as
possible.
2. The ADS-917 achieves its specified accuracies without the
need for external calibration. If required, the device's small
initial offset and gain errors can be reduced to zero using
the input circuit of Figure 2. When using this circuit, or any
similar offset and gain-calibration hardware, make adjust-
ments following warmup. To avoid interaction, always
adjust offset before gain.
3. When operating the ADS-917 from 12V supplies, do not
drive external circuitry with the REFERENCE OUTPUT. The
reference's accuracy and drift specifications may not be
met, and loading the circuit may cause accuracy errors
within the converter.
4. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") initiates a new and inaccurate
conversion cycle. Data from the interrupted and subsequent
conversions will be invalid.
ADS-917
4
CALIBRATION PROCEDURE
(Refer to Figures 2 and 3)
Any offset and/or gain calibration procedures should not be
implemented until devices are fully warmed up. To avoid
interaction, offset must be adjusted before gain. The ranges of
adjustment for the circuit of Figure 2 are guaranteed to
compensate for the ADS-917's initial accuracy errors and may
not be able to compensate for additional system errors.
All fixed resistors in Figure 2 should be metal-film types, and
multiturn potentiometers should have TCR's of 100ppm/C or
less to minimize drift with temperature.
A/D converters are calibrated by positioning their digital
outputs exactly on the transition point between two adjacent
digital output codes. This can be accomplished by connecting
LED's to the digital outputs and adjusting until certain LED's
"flicker" equally between on and off. Other approaches
employ digital comparators or microcontrollers to detect when
the outputs change from one code to the next.
For the ADS-919, offset adjusting is normally accomplished at
the point where the output bits are 0's and the LSB just
changes from a 0 to a 1. This digital output transition ideally
occurs when the applied analog input is + LSB (+305V).
Gain adjusting is accomplished when all bits are 1's and the
LSB just changes from a 1 to a 0. This transition ideally
occurs when the analog input is at +full scale minus 1 LSB's
(+9.999085V) .
Zero/Offset Adjust Procedure
1. Apply a train of pulses to the START CONVERT input
(pin 16) so the converter is continuously converting. If
using LED's on the outputs, a 200kHz conversion rate will
reduce flicker.
2. Apply +305V to the ANALOG INPUT (pin 20).
3. Adjust the offset potentiometer until the output bits are
all 0's and the LSB flickers between 0 and 1.
Gain Adjust Procedure
1. Apply +9.999085V to the ANALOG INPUT (pin 20).
2. Adjust the gain potentiometer until the output bits are all 1's
and the LSB flickers between 1 and 0.
INPUT VOLTAGE
ZERO ADJUST
GAIN ADJUST
RANGE
+ LSB
+FS 1 LSB
0 to +10V
+305V
+9.999085V
Table 1. Zero and Gain Adjust
INPUT VOLTAGE
UNIPOLAR
DIGITAL OUTPUT
(0 to +10V)
SCALE
MSB
LSB
+9.999390
+FS 1LSB
11 1111 1111 1111
+7.500000
+3/4 FS
11 0000 0000 0000
+5.000000
+1/2 FS
10 0000 0000 0000
+2.500000
+1/4 FS
01 0000 0000 0000
+0.000610
+1LSB
00 0000 0000 0001
0.000000
0
00 0000 0000 0000
Table 2. Output Coding
Figure 3. Typical ADS-917 Connection Diagram
Figure 2. ADS-917 Calibration Circuit
Coding is straight binary; 1LSB = 610V.
13
ADS-917
14
20
16
18
17
12
11
10
9
8
7
6
5
4
3
2
1
15
BIT 1 (MSB)
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
BIT 9
BIT 10
BIT 11
BIT 12
BIT 13
BIT 14 (LSB)
EOC
ANALOG
INPUT
START
CONVERT
19, 23
22
24
0.1F
4.7F
+5V
0.1F
4.7F
0.1F
4.7F
+
+
12V/15V
+12V/+15V
+
0.1F
+
4.7F
21 +10V REF. OUT
DIGITAL
GROUND
0 to +10V
ANALOG
GROUND
To Pin 20
of ADS-917
15V
SIGNAL
INPUT
GAIN
ADJUST
1.98k
50
+15V
2k
200k
20k
15V
+15V
ZERO/
OFFSET
ADJUST
ADS-917
5
THERMAL REQUIREMENTS
All DATEL sampling A/D converters are fully characterized and
specified over operating temperature (case) ranges of
0 to +70C and 55 to + 125C. All room-temperature
(T
A
= +25C) production testing is performed without the use of
heat sinks or forced-air cooling. Thermal impedance figures
for each device are listed in their respective specification
tables.
These devices do not normally require heat sinks, however,
standard precautionary design and layout procedures should
be used to ensure devices do not overheat. The ground and
power planes beneath the package, as well as all pcb signal
runs to and from the device, should be as heavy as possible to
help conduct heat away from the package.
Electrically-insulating, thermally-conductive "pads" may be
installed underneath the package. Devices should be soldered
to boards rather than "socketed", and of course, minimal air
flow over the surface can greatly help reduce the package
temperature.
In more severe ambient conditions, the package/junction
temperature of a given device can be reduced dramatically
(typically 35%) by using one of DATEL's HS Series heat sinks.
See Ordering Information for the assigned part number. See
page 1-183 of the DATEL Data Acquisition Components
Catalog for more information on the HS Series. Request
DATEL Application Note AN-8, "Heat Sinks for DIP Data
Converters", or contact DATEL directly, for additional
information.
Figure 4. ADS-917 Timing Diagram
Notes: 1. f
s
= 500kHz.
2. The ADS-917 is an edge-triggered device. All internal operations
are triggered by the rising edge of the start convert pulse, which
may be as narrow as 20nsec. All production testing is performed
at a 1MHz sampling rate with 200nsec wide start pulses. For
lower sampling rates, wider start pulses may be used, however, a
minimum pulse width low of 20nsec must be maintained.
START
CONVERT
OUTPUT
DATA
INTERNAL S/H
N
N+1
Data (N 1) Valid
200ns
typ.
Acquisition Time
10ns typ.
Data N Valid
926ns min.
EOC
90ns typ.
Conversion Time
420ns 20ns
Invalid
Data
74ns max.
70ns 10ns
570ns 40ns
430ns typ.
35ns max.
Hold
926ns min.
Invalid
Data