Document No. E0319E20 (Ver. 2.0)
Date Published April 2003 (K) Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2002-2003
DATA SHEET
128MB Direct Rambus
DRAM RIMM
Module
EBR12UC8ABFD (64M words
16 bits)
Description
The Direct Rambus RIMM module is a general-purpose
high-performance memory module subsystem suitable
for use in a broad range of applications including
computer memory, personal computers, workstations,
and other applications where high bandwidth and low
latency are required.
The EBR12UC8ABFD consists of 4 pieces of 288M
Direct Rambus DRAM (Direct RDRAM
) devices.
These are extremely high-speed CMOS DRAMs
organized as 16M words by 18 bits. The use of
Rambus Signaling Level (RSL) technology permits
1066MHz or 800MHz transfer rates while using
conventional system and board design technologies.
The architecture of the Direct RDRAM enables the
highest sustained bandwidth for multiple, simultaneous,
randomly addressed memory transactions.
The separate control and data buses with independent
row and column control yield over 95% bus efficiency.
The Direct RDRAM device's 32 banks support up to
four simultaneous transactions per device.
Features
128MB Direct RDRAM storage and 128 banks total
on module
High speed 1066MHz/800MHz Direct RDRAM
devices
184 edge connector pads with 1mm pad spacing
Module PCB size: 133.35mm
34.925mm
1.27mm
Gold plated edge connector pads contacts
Serial Presence Detect (SPD) support
Operates from a 2.5V supply
Low power and power down self refresh modes
Separate Row and Column buses for higher
efficiency
RDRAM
devices use Chip Scale Package (CSP)
FBGA (
BGA
) package
EBR12UC8ABFD
Data Sheet E0319E20 (Ver. 2.0)
4
Module Connector Pad Description
Signal
Module
Connector Pads
I/O
Type
Description
GND
A1, A3, A5, A7, A9, A11,
A13, A15, A17, A19, A21,
A23, A25, A27, A29, A31,
A33, A39, A52, A60, A62,
A64, A66, A68, A70, A72,
A74, A76, A78, A80, A82,
A84, A86, A88, A90, A92,
B1, B3, B5, B7, B9, B11,
B13, B15, B17, B19, B21,
B23, B25, B27, B29, B31,
B33, B39, B52, B60, B62,
B64, B66, B68, B70, B72,
B74, B76, B78, B80, B82,
B84, B86, B88, B90, B92
-- --
Ground reference for RDRAM core and interface. 72
PCB connector pads.
LCFM B10
I
RSL
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Positive polarity.
LCFMN B12
I RSL
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Negative polarity.
LCMD B34
I
VCMOS
Serial Command used to read from and write to the
control registers. Also used for power management.
LCOL4..LCOL0
A20, B20, A22, B22, A24 I
RSL
Column bus. 5-bit bus containing control and address
information for column accesses.
LCTM A14
I
RSL
Clock to master. Interface clock used for transmitting
RSL signals to the Channel. Positive polarity.
LCTMN A12
I RSL
Clock to master. Interface clock used for transmitting
RSL signals to the Channel. Negative polarity.
LDQA8..LDQA0
A2, B2,A4, B4, A6, B6, A8,
B8, A10
I/O RSL
Data bus A. A 9-bit bus carrying a byte of read or write
data between the Channel and the RDRAM.
LDQB8..LDQB0
B32, A32, B30, A30, B28,
A28, B26, A26, B24
I/O RSL
Data bus B. A 9-bit bus carrying a byte of read or write
data between the Channel and the RDRAM.
LROW2..LROW0 B16, A18, B18
I
RSL
Row bus. 3-bit bus containing control and address
information for row accesses.
LSCK A34
I
VCMOS
Serial clock input. Clock source used to read from and
write to the RDRAM control registers.
NC
A16, B14, A38, B38, A40,
B40, A77, B79, A43, B43,
A44, B44, A45, B45, A46,
B46, A47, B47, A48, B48,
A49, B49, A50, B50
-- --
These pads are not connected. These 24 connector
pads are reserved for future use.
RCFM B83
I
RSL
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Positive polarity.
RCFMN B81
I RSL
Clock from master. Interface clock used for receiving
RSL signals from the Channel. Negative polarity.
RCMD B59
I
VCMOS
Serial Command Input used to read from and write to
the control registers. Also used for power
management.
RCOL4..RCOL0
A73, B73, A71, B71, A69 I
RSL
Column bus. 5-bit bus containing control and address
information for column accesses.
RCTM A79
I
RSL
Clock to master. Interface clock used for transmitting
RSL signals to the Channel. Positive polarity.
RCTMN A81
I RSL
Clock to master. Interface clock used for transmitting
RSL signals to the Channel. Negative polarity.
RDQA8..RDQA0
A91, B91, A89, B89, A87,
B87, A85, B85, A83
I/O RSL
Data bus A. A 9-bit bus carrying a byte of read or write
data between the Channel and the RDRAM.
RDQB8..RDQB0
B61, A61, B63, A63, B65,
A65, B67, A67, B69
I/O RSL
Data bus B. A 9-bit bus carrying a byte of read or write
data between the Channel and the RDRAM.
RROW2..RROW0 B77, A75, B75
I
RSL
Row bus. 3-bit bus containing control and address
information for row accesses.
EBR12UC8ABFD
Data Sheet E0319E20 (Ver. 2.0)
5
Signal
Module
Connector Pads
I/O
Type
Description
RSCK A59
I
VCMOS
Serial clock input. Clock source used to read from and
write to the RDRAM control registers.
SA0
B53
I
SVDD
Serial Presence Detect Address 0.
SA1
B55
I
SVDD
Serial Presence Detect Address 1.
SA2
B57
I
SVDD
Serial Presence Detect Address 2.
SCL
A53
I
SVDD
Serial Presence Detect Clock.
SDA
A55
I/O
SVDD
Serial Presence Detect Data (Open Collector I/O).
SIN B36
I/O
VCMOS
Serial I/O for reading from and writing to the control
registers. Attaches to SIO0 of the first RDRAM on the
module.
SOUT A36
I/O
VCMOS
Serial I/O for reading from and writing to the control
registers. Attaches to SIO1 of the last RDRAM on the
module.
SVDD A56,
B56
--
--
SPD Voltage. Used for signals SCL, SDA, SWP, SA0,
SA1 and SA2.
SWP A57
I
SVDD
Serial Presence Detect Write Protect (active high).
When low, the SPD can be written as well as read.
VCMOS
A35, B35, A37, B37
--
--
CMOS I/O Voltage. Used for signals CMD, SCK, SIN,
SOUT.
VDD
A41, A42, A54, A58, B41,
B42, B54, B58
-- --
Supply voltage for the RDRAM core and interface
logic.
VREF
A51, B51
--
--
Logic threshold reference voltage for RSL signals.