EM78447S
MASK ROM
This specification is subject to change without prior notice.
2002/03/01
1
1. GENERAL DESCRIPTION
EM78447S is an 8-bit microprocessor with low-power and high-speed CMOS technology. Integrated into
a single chip are on-chip watchdog timer (WDT), RAM, ROM, real time clock/counter, external and
interrupt, power down mode, and tri-state I/O.
EM78447S
MASK ROM
This specification is subject to change without prior notice.
2002/03/01
2
2. FEATURES
Operating voltage range: 2.3V~5.5V.
Operating in temperature range: 0
C~70
C.
Operating frequency range ( base on 2 clocks)
* Crystal mode: DC~20MHz at 5V, DC~8MHz at 3V, DC~4MHz at 2.3V.
* RC mode: DC~4MHz at 5V, DC~4MHz at 3V, DC~4MHz at 2.3V.
Low power consumption:
* Less then 2.2 mA at 5V/4MHz
* Typically 30
A at 3V/32KHz
* Typically 1
A during sleep mode
4K
13 bits on chip ROM
One configuration register to accommodate user's requirements
148
8 bits on chip registers (SRAM, general purpose register)
3 bi-directional I/O ports
5 level stacks for subroutine nesting
8-bit real time clock/counter (TCC) with selective signal sources, trigger edges, and overflow interrupt
Two clocks per instruction cycle
Power down (SLEEP) mode
Two available interruptions
* TCC overflow interrupt
* External interrupt
Programmable free running watchdog timer
10 programmable pull-high pins
2 programmable open-drain pins
2 programmable R-option pins
Package types:
* 28 pin DIP 600mil
:EM78447SAP
* 28 pin SOP(SOIC) 300mil :EM78447SAM
* 28 pin SSOP 209mil
:EM78447SAS
* 32 pin DIP 300mil
:EM78447SBP
* 32 pin SOP(SOIC) 450mil :EM78447SBWM
EM78447S
MASK ROM
This specification is subject to change without prior notice.
2002/03/01
3
99.9% single instruction cycle commands
The transient point of system frequency between HXT and LXT is around 400KHz
EM78447S
MASK ROM
This specification is subject to change without prior notice.
2002/03/01
4
3. PIN ASSIGNMENT
1
2
3
4
5
6
7
8
TCC
NC
VSS
/INT
P50
P51
9
10
11
12
13
14
/RESET
OSCI
OSCO
P77
P76
P75
P52
P53
P60
P61
P62
VDD
P63
P64
P74
P73
P72
P71
P70
P67
P66
P65
DIP
SOP
SOIC
18
17
16
15
28
27
26
25
24
23
22
21
20
19
1
2
3
4
5
6
7
8
VSS
VDD
/INT
VSS
P50
P51
9
10
11
12
13
14
/RESET
OSCI
OSCO
P77
P76
P75
P52
P53
P60
P61
P62
TCC
P63
P64
P74
P73
P72
P71
P70
P67
P66
P65
SSOP
18
17
16
15
28
27
26
25
24
23
22
21
20
19
1
2
3
4
5
6
7
8
TCC
NC
VSS
/INT
P50
P51
9
10
11
12
13
14
/RESET
OSCI
OSCO
P77
P76
P75
P52
P53
P60
P61
P62
VDD
P63
P64
P74
P73
P72
P71
P70
P67
P66
P65
DIP
SOP
SOIC
22
21
20
19
32
31
30
29
28
27
26
25
24
23
15
16
P55
P54
P56
P57
18
17
EM78447SAP
EM78447SAM
EM78447SBP
EM78447SBWM
EM78447SAS
Fig. 1 Pin assignment
Table 1 EM78447SAP and EM78447SAM Pin Description
Symbol Pin No.
Type
Function
VDD
2
-
* Power supply.
OSCI
27
I
* XTAL type: Crystal input terminal or external clock input pin.
* RC type: RC oscillator input pin.
OSCO
26
I/O
* XTAL type: Output terminal for crystal oscillator or external clock input
pin.
* RC type: Instruction clock output.
* External clock signal input.
TCC
1
I
* The real time clock/counter (with Schmitt trigger input pin), must be tied to
VDD or VSS if not in use.
/RESET
28
I
* Input pin with Schmitt trigger. If this pin remains at logic low, the controller
will also remain in reset condition.
P50~P53
6~9
I/O
* P50~P53 are bi-directional I/O pins.
P60~P67 10~17
I/O
* P60~P67 are bi-directional I/O pins. These can be pulled-high internally
by software control.
P70~P77 18~25
I/O
* P70~P77 are bi-directional I/O pins.
* P74~P75 can be pulled-high internally by software control.
* P76~P77 can have open-drain output by software control.
* P70 and P71 can also be defined as the R-option pins.
EM78447S
MASK ROM
This specification is subject to change without prior notice.
2002/03/01
5
/INT
5
I
* External interrupt pin triggered by falling edge.
VSS
4
-
* Ground.
NC
3
-
* No connection.
Table 2 EM78447SAS Pin Description
Symbol Pin No.
Type
Function
VDD
3
-
* Power supply.
OSCI
27
I
* XTAL type: Crystal input terminal or external clock input pin.
* RC type: RC oscillator input pin.
OSCO
26
I/O
* XTAL type: Output terminal for crystal oscillator or external clock input
pin.
* RC type: Instruction clock output.
* External clock signal input.
TCC
2
I
* The real time clock/counter (with Schmitt trigger input pin), must be tied to
VDD or VSS if not in use.
/RESET
28
I
* Input pin with Schmitt trigger. If this pin remains at logic low, the controller
will also remain in reset condition.
P50~P53
5~8
I/O
* P50~P53 are bi-directional I/O pins.
P60~P67 9~13,
15~17
I/O
* P60~P67 are bi-directional I/O pins. These can be pulled-high internally
by software control.
P70~P77 18~25
I/O
* P70~P77 are bi-directional I/O pins.
* P74~P75 can be pulled-high internally by software control.
* P76~P77 can have open-drain output by software control.
* P70 and P71 can also be defined as the R-option pins.
/INT
4
I
* External interrupt pin triggered by falling edge.
VSS
1,14
-
* Ground.
Table 3 EM78447SBP and EM78447SBWM Pin Description
Symbol Pin No.
Type
Function
VDD
4
-
* Power supply.
OSCI
29
I
* XTAL type: Crystal input terminal or external clock input pin.
* RC type: RC oscillator input pin.
OSCO
28
I/O
* XTAL type: Output terminal for crystal oscillator or external clock input
pin.
* RC type: Instruction clock output.
* External clock signal input.
TCC
3
I
* The real time clock/counter (with Schmitt trigger input pin), must be tied
to VDD or VSS if not in use.
/RESET
30
I
* Input pin with Schmitt trigger. If this pin remains at logic low, the
controller will also remain in reset condition.
P50~P57 8~11,2~1,
32~31
I/O
* P50~P57 are bi-directional I/O pins.
P60~P67 12~19
I/O
* P60~P67 are bi-directional I/O pins. These can be pulled-high internally
by software control.
P70~P77 20~27
I/O
* P70~P77 are bi-directional I/O pins.
* P74~P75 can be pulled -high internally by software control.
* P76~P77 can have open-drain output by software control.
* P70 and P71 can also be defined as the R-option pins.
/INT
7
I
* External interrupt pin triggered by falling edge.
VSS
6
-
* Ground.
NC
5
-
* No connection.
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