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Электронный компонент: EM4022V11WS11

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Copyright
2002, EM Microelectronic-Marin SA
1
www.emmicroelectronic.com
EM MICROELECTRONIC
- MARIN SA
EM4022
Multi Frequency Contactless Identification Device
Anti-Collision compatible with BTG's Supertag Category Protocols
Description
The EM4022 (previously named P4022) chip implements
patented anti-collision protocols for both high frequency
and low frequency applications. It is even possible to
identify transponders with identical codes, thereby
making it possible to count identical items. The chip is
typically used in "passive" transponder applications, i.e. it
does not require a battery power source. Instead, it is
powered up by an electromagnetic energy field or beam
transmitted by the reader, which is received and rectified
to generate a supply voltage for the chip. A pre-
programmed code is transmitted to the reader by varying
the amount of energy that is reflected back to the reader.
This is done by modulating an antenna or coil, thereby
effectively varying the load seen by the reader.
Typical Applications
Access
control
Animal
tagging
Asset
control
Sports event timing
Licensing
Electronic
keys
Auto-tolling
Features
Implements all BTG anti-collision protocols:
Fast SWITCH-OFF, SLOW-DOWN, and
FREE-RUNNING
Can be used to implement low frequency
inductive coupled transponders, high frequency
RF coupled transponders or bi-frequency
transponders
Reading 500 transponders in less than one
second for high frequency applications
Factory programmed 64 bit ID number
Data rate options form 4 kbit/s to 64 kbit/s
Manchester data encoding
Any field frequency: Typically 125 kHz, 13.56
MHz inductive and 100 MHz to 2.54 GHz RF
Data transmission done by amplitude
modulation
Trimmed 110 pF 3% on-chip resonant
capacitor
On-chip oscillator, rectifier and voltage limiter
Low power consumption
Low voltage operation : down to 1.5 V at
ambient temperature
-40 to +85
C operating temperature range
Pin Assignment
1
2
3
8
9
10
11
5
7
EM4 022
4
6
Fig. 1
Pad N
Name
Function
1
XCLK
external test clock input
2
V
DD
positive supply
3
M
connection to antenna
4
M
TST
test output
5
COIL1
Coil terminal 1
6
COIL2
Coil terminal 2
7
V
SSTST
negative test supply output
8
V
SS
negative supply
9
GAP
GAP input
10
SI
Serial test data input (pull down)
11
TMC
Test mode control (pull down)
Copyright
2002, EM Microelectronic-Marin SA
2
www.emmicroelectronic.com
EM4022
Typical Operating Configurations
Low frequency inductive transponder .
Coil1
Coil2
EM4022
V
DD
CPX
M
L
GAP V
SS
D1
Fig. 2
Low frequency applications are those applications that
can make use of the on-chip full wave rectifier bridge to
rectify the incident energy. These are typically
applications that use inductive coupling to transmit
energy to the chip. The carrier frequency is typically less
than 500 kHz. The design of the on-chip rectifier and
resonance capacitor is optimized for frequencies in the
order of 125 kHz. Low frequency transponders can be
implemented using just a EM4022 chip and an external
coil that resonates with the on-chip tuning capacitor at
the required carrier frequency. An external power
storage capacitor is required to maintain the supply
voltage above the integrated power on reset level.
In a very strong field, due to the forward resistance of the
diode, the GAP input must be limited at V
SS
-0.3V by a
schottky diode (D1)
Medium frequency (13.56 MHz) inductive transponder
implementation
EM4022
V
DD
CPX
M
L
GAP V
SS
D1
D2*
C
Fig. 3
L:
coil antenna (typical value 1.35 H).
C:
tuning capacitor (typical value 100 pF)
Medium frequency
applications are those which cannot
use the integrated full wave rectifier and where the
transponder power is transmitted through a coil. External
microwave schottky diodes are required to rectify the
carrier wave. An external power storage capacitor can be
added to improve reading range.
These applications allow higher data rates (64 kbit/s).
Where reading rates of 500 transponders per second
can be achieved
High frequency
RF transponder implementation.
EM4022
V
DD
CPX
M
GAP V
SS
D1
D2*
D3
Coil1
Coil2
Fig. 4
D2 in figure 2 and 3 is optional and is only used for GAP
enable versions. All diodes are schottky type.
High frequency applications are similar to medium
frequency applications. These are typically applications
that use electromagnetic RF coupling to transmit energy
to the chip using carrier frequencies greater than
100
MHz. High frequency transponders can be
implemented using a EM4022 chip, two or three
microwave diodes and a printed antenna. High frequency
RF coupled applications typically have higher reading
distances (> 4 m) and
Bi-frequency
applications are possible by implementing
a coil between coil1 and coil2 connections in the high
frequency application (fig. 4).
Copyright
2002, EM Microelectronic-Marin SA
3
www.emmicroelectronic.com
EM4022
Absolute Maximum Ratings
Parameter
Symbol
Conditions
Maximum AC peak current
induced on COIL1 and
COIL2
I
COIL
30 mA
Maximum DC voltage
induced between M and V
SS
V
M
(note1)
5 V
Maximum DC current
supplied into M
I
M
(note1)
60 mA
Power supply
V
DD
- V
SS
-0.3 to V
M
Max. voltage other pads
V
max
V
DD
+ 0.3 V
Min. voltage other pads
V
max
V
SS
- 0.3 V
Storage temperature
T
STORE
-55 to +125
o
C
Electrostatic discharge
maximum to MIL-STD-883C
method 3015
V
ESD
1000 V
note1) whatever is reached first
Stresses above these listed maximum ratings may cause
permanent damage to the device. Exposure beyond
specified operating conditions may affect device
reliability or cause malfunction.
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, due to the unique
properties of this device, anti-static precautions should
be taken as for any other CMOS component. Unless
otherwise specified, proper operation can only occur
when all the terminal voltages are kept within the supply
voltage range.
Operating Conditions
Parameter
Symbol Min Typ Max Units
Operating temperature T
A
-40
+85
o
C
Maximum coil current
I
COIL
-10
10
mA
AC voltage on coil*
V
COIL
15
V
pp
DC voltage on M*
V
M
3.5
V
* The AC voltage on the coil and the DC voltage at pad
M are limited by the on-chip shunt regulator loaded at
I
COIL
in table 3
Electrical Characteristics
V
SUPPLY
between 2.0 V and 3.0 V, T
A
= 25
O
C, unless otherwise specified.
Parameter
Symbol Test conditions
Min
Typ
Max Units
Supply voltage (V
DD
- V
SS
)
V
SUPPLY
V
PONR
+100mV
V
M
V
Regulated voltage
V
M
I
M
= 50 mA
3.3
4
4.7
V
Oscillator frequency
F
OSC
V
SUPPLY
= 3 V
92
125
160
kHz
Power-on reset threshold
V
PONR
V
SUPPLY
rising
0.9
1.4
1.8
V
Power-on reset threshold
V
PONF
V
SUPPLY
falling
0.7
1.2
1.6
V
Power-on reset hysteresis
V
PHYS
80
160
240
mV
GAP input time constant
T
GAP
Extrapolated with an external
capacitor of 64nF
0.4
s
Modulation transistor ON resistance
R
ON
V
SUPPLY
= 3 V
4
8
Resonance capacitor
C
R
f = 100KHz, 100mVpp
106.7
110 113.3
pF
Supply capacitor
C
SUP
f = 100KHz, 100mVpp
140
pF
Current consumption in modulation state I
MOD
V
SUPPLY
= 2 V
6
9
13
A
Shunt Regulator current consumption
I
SHUNT
V
SUPPLY
= 2V
200
500
nA
Gap pull-up current consumption
I
GAP
V
GAP
= 0V, V
SUPPLY
= 2V
1.8
5
7
A
Dynamic current consumption
I
DYN
f
OSC
= 128KHz, V
SUPPLY
= 2V
3.5
5
6.5
A
Timing Characteristics
1) All timings are derived from the on-chip oscillator.
2) The minimum low frequency GAP width for a single chip is 1 bit at its own clock frequency. The reader must however
allow for the spread in clock frequencies possible in a group of tags. Therefore the minimum width of the GAP in MUTE
and WAKE-UP signals must be 1.5 bits. High frequency GAPs can be arbitrarily.
3) The maximum GAP width for a single chip is 6 bits at its own clock frequency. The reader must however allow for the
spread in clock frequencies possible in a group of tags. Therefore the maximum width of the GAP in MUTE and WAKE-UP
signals must be 5 bits.
Parameter
Symbol Test conditions
Min
Typ
Max Units
High frequency GAP width
T
HFGAP
50
ns
High frequency ACK GAP width
W
HFACK
6
bit
High frequency MUTE and WAKE-UP GAP width
W
HFMUTE
5
bit
Low frequency ACK GAP width
W
LFGAP
1.0
2
6
bit
Low frequency MUTE and WAKE-UP GAP width
W
LFACK
1.5
2
5
bit
GAP separation in WAKE-UP signal
W
LFMUTE
1.5
2
5
bit
Copyright
2002, EM Microelectronic-Marin SA
4
www.emmicroelectronic.com
EM4022
Power storage capacitor calculation
The global current consumption of the device defines the
external storage capacitor.
When the device modulate, the supply voltage is picked
from the supply capacitor and should never decrease
under the falling edge of the power on reset (V
PONF
). If
this occurs, the device goes in a reset mode and any
data transmission is aborted. The worst case for the
storage capacitor calculation is when the device is put in
the electromagnetic field. At this moment the supply
reaches the V
PONR
and start to modulate. During
modulation the power store in the capacitor must be high
enough so that at the end of the modulation the supply is
higher than V
PORF.
. This means that the voltage reduction
on the capacitor must be less than the hysteresis of the
power on reset (V
PHYS
).
And this when the chip has a supply voltage of around
the power on reset threshold
The total current consumption from the storage capacitor
is defined by the modulation current I
MOD
,
This current is the consumption of the power on reset
block, oscillator and the logic which work at a typical
frequency of 125KHz. The GAP current is also included
in this parameter.
The duration where this currents is present for the
capacitor calculation, is dependent of the data rate
Calculation example :
Below we define typical cases combinations :
F
OSC
= 125 KHz
V
PHYS
= 120 mV
I
MOD
= 9
A
Data rate is 4 KBaud.
CPx
I
F
V
BaudRate
nF
MOD
OSC
HYS
=
=
=
-
-
*
*
*
*
*
*
*
*
*
*
* *
.
128 10
9 10
128 10
125 10 160 10
4 10
14 4
3
6
3
3
3
3
Of course, this value can be adapted to the
electromagnetic power and to the performances that
must be achieved. If a tag is put in a field within a short
time, the emitting power must be high enough to charge
up the capacitor.
The chip integrates a 140pF supply capacitor.
Block Diagram
Shunt
PON
VDD
VSS
GAP
N
P
C
R
TST
VDD
VDD
CG
RG
DG
D1
D3
D2
D4
OSC
CP
Q1
Q2
CR
M
COIL1
GAP
SI
XCLK TMC
VSS
VDD
COIL2
LOGIC
VSS VSS VSS
Fig. 5
Copyright
2002, EM Microelectronic-Marin SA
5
www.emmicroelectronic.com
EM4022
Functional description
Resonance capacitor
The resonance capacitor CR has a nominal value of 110
pF and is trimmed to achieving a high stability over the
whole production. For resonance at 125 kHz an external
14.7 mH coil is required. At 13.65 MHz the required coil
inductance drops to 1.2
H.
Rectifier bridge
Diodes D1-D4 form a full wave rectifier bridge. They
have relatively large forward resistances (100 -200
).
This is sufficient at 125 kHz, where the output
impedance of the tuned circuit is high, but at 13.5 MHz
the diode resistance becomes significant and external
diodes have to be used to bypass the internal ones. The
diode resistance affects the rate at which the power
capacitor CP can be charged. It also affects the
modulation depth that can be achieved.
Shunt regulator
The shunt regulator has two functions. It limits the
voltage across the logic and in high frequency
applications it limits the voltage across the external
microwave Schottky diodes, which typically have reverse
breakdown voltages of 5 V.
Oscillator
The on-chip RC oscillator has a center frequency of 128
kHz. It gives the main clock of the logic and defines the
effective data/rate.
Power-on reset (PON)
The reset signal keeps the logic in reset when the supply
voltage is lower than the threshold voltage. This
prevents incorrect operation and spurious transmissions
when the supply voltage is too low for the oscillator and
logic to work properly. It also ensures that transistor Q2
is off and transistor Q1 is on during power-up to ensure
that the chip starts up.
Modulation transistor
The N channel transistor Q2 is used to modulate the
transponder coil or antenna. When it is turned on it loads
the antenna or coil, thereby changing the load seen by
the reader antenna or coil, and effectively changing the
amount of energy that is reflected to the reader. Its low
on resistance is especially designed for high frequency
applications.
Charge preservation transistor
The P channel transistor Q1 is turned off whenever the
modulation transistor Q2 is turned on to prevent Q2 from
discharging the power storage capacitor. This is done in
a non-overlapping manner, i.e. Q1 is first turned off
before Q2 is turned on, and Q2 is turned off before Q1 is
turned on.
Gap detection
Poly-silicon diode DG is used to detect a gap in the
illuminating field. It is a minimum sized diode with
forward resistance in the order of 2 k
.==The low pass
filter shown diagrammatically as CG and RG actually
consists of a pull-up transistor (approximately 100 k
) in
conjunction with the parasitic capacitance of the GAP
input pad (approximately 2.5 pF).
Through the diode the GAP input will be pulled low
during each negative going cycle of the carrier. When
the carrier is switched off, the GAP input will be pulled
high by the pull-up transistor.
At very high carrier frequencies (> 100 MHz) the carrier
will be filtered out, so that the GAP input will be low
continuously when the carrier is present. When the
carrier disappears, the GAP input will go high with the
time constant of the low pass filter. At very low
frequencies the GAP input will go high and low at each
cycle of the carrier, and will stay high when the carrier
disappears. To detect the gap, the logic must check for
a high period longer than the maximum high period of
the carrier.
As the rise and fall times of the GAP can be slow, a
Schmitt trigger is used to buffer the GAP input.
LOGIC block
Depending on the state of the SI input at power-up, the
EM4022 either enters a test mode (SI = 1) or its normal
operating mode (SI = 0). The SI pin is internally pulled
down, so that it can be left open for normal operation.
After the power-on reset has disappeared, the chip boots
by reading the SEED and CTL ROMs.
The chip then enters its normal operating mode, which
basically consists of clocking a 16 bit timer counter with
the bit rate clock until it compares with the number in the
random number generator. At this point a code (which is
stored in the ID ROM) is transmitted with the correct
preamble at the correct data rate and encoded correctly.
The random number generator is clocked to generate a
new pseudo random number, and the 16 bit counter is
reset to start a new delay.
The width of the comparison between the 16 bit random
number and the 16 bit delay count determines the
maximum possible delay between transmissions
(repetition rate). Any one of eight maximum delay
settings can be pre-programmed.
The basic free-running mode as described above can be
modified by the reception of GAP (MUTE and ACK)
signals, if these are enabled by the CTL bits.
If an ACK signal is received after transmission of a code,
the chip either turns itself off completely or reduces the
rate at which the delay counter is clocked, thereby
slowing down the rate at which codes are transmitted.
If a MUTE signal is received while the chip is not
transmitting, the current operation of the chip is
interrupted for 128 clock periods, after which it continues
normally. Reception of more MUTEs during the sleep
state restarts the sleep state. The sleep state is also
terminated by the reception of a WAKE-UP signal (an
ACK signal to a chip which has just completed
transmitting).