EM6622
03/02 REV. C/445
Copyright
2002, EM Microelectronic-Marin SA
1
www.emmicroelectronic.com
Ultra Low Power Microcontroller with 4x32 LCD Driver
Features
Low Power
- 3.0 A active mode, LCD On
- 0.6 A standby mode, LCD Off
- 0.2 A sleep mode
@ 1.5 V, 32 KHz, 25 C
Low Voltage - 1.2 to 3.6 V
2 clocks per instruction cycle
72 basic instructions
ROM 4k x 16 bits
RAM 128 x 4 bits
Max. 12 inputs ; port A, port B, port SP
Max. 8 outputs ; port B, port SP
Voltage Level Detector, 8 levels software
selectable from 1.2 V up to 4.0 V
Melody, 7 tones + silence inclusive 4-bit timer
Universal 10-bit counter, PWM, event counter
Prescaler down to 1 second ( crystal = 32 KHz )
1/1000 sec 12 bit binary coded decimal counter
with hard or software start/stop function
LCD 32 Segments, 3 or 4 times multiplexed
3 wire serial port , 8 bit, master and slave mode
5 external interrupts (port A, serial interface)
8 internal interrupts (3x prescaler, BCD counter
2x10-bit counter, melody timer, serial interface)
timer watchdog and oscillation supervisor
Description
The EM6622 is an advanced single chip low cost
CMOS 4-bit microcontroller. It contains ROM, RAM,
LCD driver, power on reset, watchdog timer,
oscillation detection circuit, 10-bit up/down and
event counter, 1ms BCD counter, prescaler, voltage
level detector (Vld), serial interface and several
clock functions. The low voltage feature and low
power consumption make it the most suitable
controller for battery, stand alone and mobile
equipment. The EM6622 is manufactured using EM
Microelectronic's advanced low power (ALP) CMOS
process.
Typical Applications
Timing
device
Automotive controls with display
Intelligent display driver
Measurement
equipment
Domestic
appliance
Interactive system with display
Timer / sports timing devices
Bicycle
computers
Safety and security devices
Figure 1. Architecture
Figure 2. Pin Configuration, TQFP64 10 * 10 * 1 mm
EM MICROELECTRONIC
- MARIN SA
EM6622
03/02 REV. C/445
Copyright
2002, EM Microelectronic-Marin SA
2
www.emmicroelectronic.com
EM6622 at a glance
Power Supply
- Low voltage low power architecture
including internal voltage regulator
- 1.2 ... 3.6 V battery voltage
- 3.0 A in active mode (Xtal, LCD on, 25
C)
- 0.6 A in standby mode (Xtal, LCD off, 25
C)
- 0.2 A in sleep mode (25
C)
- 32 KHz Oscillator
RAM
- 64 x 4 bit, direct addressable
-
64 x 4 bit, indexed addressable
ROM
- 4k x 16 bit, metal mask programmable
CPU
- 4-bit RISC architecture
- 2 clock cycles per instruction
- 72 basic instructions
Main Operating Modes and Resets
- Active mode (CPU is running)
- Standby mode (CPU in halt)
- Sleep mode (no clock, reset state)
- Initial reset on power on (POR)
- Watchdog reset (logic and oscillation watchdogs)
- Reset terminal
- Reset with input combination on port A (register
selectable)
Prescaler
- 15 stage system clock divider down to 1Hz
- 3 Interrupt requests; 1Hz, 32Hz or 8Hz, Blink
- Prescaler reset (4kHz to 1Hz)
Liquid Crystal Display Driver (LCD)
- 32 Segments 3 or 4 times multiplexed
- Internal or external voltage multiplier
- Free Segment allocation architecture (metal 2 mask)
- LCD switch off for power save
8-Bit Serial Interface
- 3 wire (Clock, DataIn , DataOut) master/slave mode
- READY output during data transfer
- Maximum shift clock is equal to the main system clock
- Interrupt request to the CPU after 8 bits data transfer
- Supports different serial formats
- Can be configured as a parallel 4 bit input/output port
- Direct input read on the port terminals
- All outputs can be put tristate (default)
- Selectable pull-downs in input mode
- CMOS or
Nch.
open drain outputs
- Weak pull-up selectable in Nch.
open drain
mode
4-Bit Input Port A
- Direct input read on the port terminals
- Debouncer function available on all inputs
- Interrupt request on positive or negative edge
- Pull-up or pull-down or none selectable by register
- Test variables (software) for conditional jumps
- PA[0] and PA[3] are inputs for the event counter
- PA[3] is Start/Stop input for the millisecond counter
- Reset with input combination (register selectable)
4-Bit Bi-directional Port B
- All different functions bit-wise selectable
- Direct input read on the port terminals
- Data output latches
- CMOS or Nch. open drain outputs
- Pull-down or pull-up selectable
- Weak pull-up in Nch. open drain mode
- Selectable PWM, 32kHz, 1kHz and 1Hz output
Melody Generator
- Dedicated Buzzer terminal
- 7 tones plus silence output
- The output can be put tristate (default)
- Internal 4-bit timer, usable also in standalone mode
- 4 different timer input clocks
- Timer with automatic reload or single run
- Timer interrupt request when reaching 0
Voltage Level Detector (SVLD)
- 8 different levels from 1.2 V to 4.0 V.
- Busy flag during measure
10-Bit Universal Counter
- 10, 8, 6 or 4 bit up/down counting
- Parallel load
- Event counting (PA[0] or PA[3])
- 8 different input clocks-
- Full 10 bit or limited (8, 6, 4 bit)
compare function
- 2 interrupt requests (on compare and on 0)
- Hi-frequency input on PA[3] and PA[0]
- Pulse width modulation (PWM) output
Millisecond Counter
- 3 digits binary coded decimal counter (12 bits)
- PA[3] input signal pulse width and period measurement
- Internal 1000 Hz clock generation
- Hardware or software controlled start stop mode
- Interrupt request on either 1/10 Sec or 1Sec
Interrupt Controller
- 5 external and 8 internal interrupt request sources
- Each interrupt request can individually be masked
- Each interrupt flag can individually be reset
- Automatic reset of each interrupt request after read
- General interrupt request to CPU can be disabled
- Automatic enabling of general interrupt request flag
when going into HALT mode.
EM6622
03/02 REV. C/445
Copyright
2002, EM Microelectronic-Marin SA
3
www.emmicroelectronic.com
Table of Contents
FEATURES __________________________________ 1
DESCRIPTION _______________________________ 1
TYPICAL APPLICATIONS ______________________ 1
EM6622 AT A GLANCE ________________________ 2
1.
PIN DESCRIPTION FOR EM6622 ____________ 4
2.
OPERATING MODES ______________________ 6
2.1
A
CTIVE
M
ODE
__________________________ 6
2.2
S
TANDBY
M
ODE
________________________ 6
2.3
S
LEEP
M
ODE
__________________________ 6
3.
POWER SUPPLY _________________________ 7
4.
RESET__________________________________ 8
4.1
O
SCILLATION
D
ETECTION
C
IRCUIT
___________ 9
4.2
R
ESET
T
ERMINAL
______________________ 10
4.3
I
NPUT
P
ORT
A R
ESET
F
UNCTION
___________ 10
4.4
D
IGITAL
W
ATCHDOG
T
IMER
R
ESET
__________ 11
4.5
CPU S
TATE AFTER
R
ESET
_______________ 11
5.
OSCILLATOR AND PRESCALER ___________ 12
5.1
O
SCILLATOR
__________________________ 12
5.2
P
RESCALER
__________________________ 12
6.
INPUT AND OUTPUT PORTS ______________ 13
6.1
P
ORTS
O
VERVIEW
_____________________ 13
6.2
P
ORT
A _____________________________ 14
6.2.1
IRQ on Port A____________________ 14
6.2.2
Pull-up or Pull-down_______________ 15
6.2.3
Software Test Variables____________ 15
6.2.4
Port A for 10-Bit Counter and MSC ___ 15
6.3
P
ORT
A R
EGISTERS
____________________ 15
6.4
P
ORT
B _____________________________ 17
6.4.1
Input / Output Mode _______________ 17
6.4.2
Pull-up or Pull-down_______________ 18
6.4.3
PWM and Frequency Output ________ 19
6.5
P
ORT
B R
EGISTERS
____________________ 19
6.6
P
ORT
S
ERIAL
_________________________ 20
6.6.1
4-bit Parallel I/O __________________ 20
6.6.2
Pull-up or Pull-down_______________ 21
6.6.3
Nch. Open Drain Outputs___________ 22
6.6.4
General Functional Description ______ 22
6.6.5
Detailed Functional Description ______ 23
6.6.6
Output Modes ___________________ 23
6.6.7
Reset and Sleep on Port SP ________ 24
6.7
S
ERIAL
I
NTERFACE
R
EGISTERS
____________ 25
7.
MELODY, BUZZER _______________________ 27
7.1
4-B
IT
T
IMER
__________________________ 27
7.1.1
Single Run Mode _________________ 28
7.1.2
Continuos Run Mode ______________ 28
7.2
P
ROGRAMMING
O
RDER
__________________ 29
7.3
M
ELODY
R
EGISTERS
____________________ 29
8.
10-BIT COUNTER ________________________ 31
8.1
F
ULL AND
L
IMITED
B
IT
C
OUNTING
___________ 31
8.2
F
REQUENCY
S
ELECT AND
U
P
/D
OWN
C
OUNTING
_ 32
8.3
E
VENT
C
OUNTING
______________________ 33
8.4
C
OMPARE
F
UNCTION
____________________ 33
8.5
P
ULSE
W
IDTH
M
ODULATION
(PWM)_________ 33
8.5.1
How the PWM Generator works. _____ 34
8.5.2
PWM Characteristics ______________ 34
8.6
C
OUNTER
S
ETUP
______________________ 35
8.7
10-
BIT
C
OUNTER
R
EGISTERS
_____________ 35
9.
MILLISECOND COUNTER_________________ 37
9.1
PA[3] I
NPUT FOR
MSC _________________ 37
9.2
IRQ
FROM
MSC ______________________ 37
9.3
MSC-M
ODES
________________________ 38
9.4
M
ODE SELECTION
______________________ 38
9.5
M
ILLISECOND
C
OUNTER
R
EGISTERS
________ 40
10.
INTERRUPT CONTROLLER _____________ 41
10.1
I
NTERRUPT
C
ONTROL
R
EGISTERS
__________ 42
11.
SUPPLY VOLTAGE LEVEL DETECTOR ___ 43
11.1
SVLD R
EGISTER
______________________ 43
12.
STROBE OUTPUT _____________________ 44
12.1
S
TROBE
R
EGISTER
____________________ 44
13.
RAM ________________________________ 45
14.
LCD DRIVER _________________________ 46
14.1
LCD C
ONTROL
_______________________ 47
14.2
LCD A
DDRESSING
_____________________ 47
14.3
F
REE
S
EGMENT
A
LLOCATION
_____________ 48
14.4
LCD R
EGISTERS
______________________ 48
15.
PERIPHERAL MEMORY MAP____________ 50
16.
OPTION REGISTER MEMORY MAP _______ 54
17.
ACTIVE SUPPLY CURRENT TEST ________ 55
18.
MASK OPTIONS ______________________ 56
18.1
I
NPUT
/ O
UTPUT
P
ORTS
_________________ 56
18.1.1
Port A Metal Options ______________ 56
18.1.2
Port A Metal Options ______________ 56
18.1.3
Port B Metal Options ______________ 57
18.1.4
Port SP Metal Options_____________ 58
18.1.5
Voltage Regulator Option __________ 58
18.1.6
Debouncer Frequency Option_______ 59
18.1.7
User defined LCD Segment Allocation 59
19.
TEMP. AND VOLTAGE BEHAVIORS ______ 61
19.1
IDD C
URRENT
(T
YPICAL
) ________________ 61
19.2
P
ULL
-
DOWN
R
ESISTANCE
(T
YPICAL
) ________ 61
19.3
P
ULL
-
UP
R
ESISTANCE
(T
YPICAL
) ___________ 62
19.4
O
UTPUT
C
URRENTS
(T
YPICAL
) ____________ 62
20.
ELECTRICAL SPECIFICATION___________ 63
20.1
A
BSOLUTE
M
AXIMUM
R
ATINGS
____________ 63
20.2
H
ANDLING
P
ROCEDURES
________________ 63
20.3
S
TANDARD
O
PERATING
C
ONDITIONS
________ 63
20.4
DC C
HARACTERISTICS
- P
OWER
S
UPPLY
_____ 63
20.5
S
UPPLY
V
OLTAGE
L
EVEL
D
ETECTOR
________ 64
20.6
O
SCILLATOR
_________________________ 64
20.7
DC
CHARACTERISTICS
- I/O P
INS
__________ 65
20.8
LCD SEG[20:1] O
UTPUTS
______________ 66
20.9
LCD C
OM
[4:1] O
UTPUTS
________________ 66
20.10
DC O
UTPUT
C
OMPONENT
_____________ 66
20.11
LCD V
OLTAGE
M
ULTIPLIER
_____________ 66
21.
PAD LOCATION DIAGRAM______________ 67
22.
PACKAGE & ORDERING INFORMATION __ 68
22.1 O
RDERING
I
NFORMATION
________________ 69
22.2
P
ACKAGE
M
ARKING
____________________ 69
22.3
C
USTOMER
M
ARKING
___________________ 69
EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than
circuitry entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA
reserves the right to change the circuitry and specifications without notice at any time. You are strongly urged
to ensure that the information given has not been superseded by a more up-to-date version.
EM6622
03/02 REV. C/445
Copyright
2002, EM Microelectronic-Marin SA
4
www.emmicroelectronic.com
1. Pin Description for EM6622
Chip
TQFP
64
DIL
64
Signal Name
Function
Remarks
1
6
62
C2B
Voltage multiplier
Not needed if ext. supply
2
7
63
C2A
Voltage multiplier
Not needed if ext. supply
3
8
64
C1B
Voltage multiplier
Not needed if ext. supply
4
9
1
C1A
Voltage multiplier
Not needed if ext. supply
5
10
2
VL1
Voltage multiplier level 1
LCD level 1 input, if external
supply selected
6
11
3
VL2
Voltage multiplier level 2
LCD level 2 input, if external
supply selected
7
12
4
VL3
Voltage multiplier level 3
LCD level 3 input, if external
supply selected
8
13
5
COM[1]
LCD back plane 1
9
14
6
COM[2]
LCD back plane 2
10
15
7
COM[3]
LCD back plane 3
11
16
8
COM[4]
LCD back plane 4
Not used if 3 times multiplexed
12
17
9
SEG[32]
LCD Segment 32
13
18
10
SEG[31]
LCD Segment 31
14
19
11
SEG[30]
LCD Segment 30
15
20
12
SEG[29]
LCD Segment 29
16
21
13
SEG[28]
LCD Segment 28
17
22
14
SEG[27]
LCD Segment 27
18
23
15
SEG[26]
LCD Segment 26
19
24
16
SEG[25]
LCD Segment 25
20
25
17
SEG[24]
LCD Segment 24
21
26
18
SEG[23]
LCD Segment 23
22
27
19
SEG[22]
LCD Segment 22
23
28
20
SEG[21]
LCD Segment 21
24
29
21
SEG[20]
LCD Segment 20
25
30
22
SEG[19]
LCD Segment 19
26
31
23
SEG[18]
LCD Segment 18
27
32
24
SEG[17]
LCD Segment 17
28
33
25
SEG[16]
LCD Segment 16
29
34
26
SEG[15]
LCD Segment 15
30
35
27
SEG[14]
LCD Segment 14
31
36
28
SEG[13]
LCD Segment 13
32
37
29
SEG[12]
LCD Segment 12
33
38
30
SEG[11]
LCD Segment 11
34
39
31
SEG[10]
LCD Segment 10
35
40
32
SEG[9]
LCD Segment 9
36
41
33
SEG[8]
LCD Segment 8
37
42
34
SEG[7]
LCD Segment 7
38
43
35
SEG[6]
LCD Segment 6
39
44
36
SEG[5]
LCD Segment 5
40
45
37
SEG[4]
LCD Segment 4
41
46
38
SEG[3]
LCD Segment 3
42
47
39
SEG[2]
LCD Segment 2
43
48
40
SEG[1]
LCD Segment 1
44
49
41
Reset
Input reset terminal,
internal pull-down 15 KOhm
Main reset
45
50
42
Test
Input test terminal,
internal pull-down 15 KOhm
For EM tests only, ground 0 !
Except when needed for MFP
programming
EM6622
03/02 REV. C/445
Copyright
2002, EM Microelectronic-Marin SA
5
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Chip
TQFP
64
DIL
64
Signal Name
Function
Remarks
46
51
43
PSP[0]
Input/output , open drain
serial port : SIN
parallel out terminal 0
Serial interface data in
or
parallel data[0] in/out
47
52
44
PSP[1]
Output , open drain
serial port : Ready/CS
parallel out terminal 1
Serial interface Ready CS
or
parallel data[1] in/out
48
53
45
PSP[2]
Output , open drain
serial port : SOUT
parallel out terminal 2
Serial interface data out
or
parallel data[2] in/out
49
54
46
PSP[3]
Input/output , open drain
serial port : SCLK
parallel out terminal 3
Serial interface clock I/O
or
parallel data[3] in/out
50
55
47
PB[0]
Input/output, open drain
port B terminal 0
Port B data[0] I/O or
Ck[1] output
51
56
48
PB[1]
Input/output, open drain
port B terminal 1
Port B data[1] I/O or
Ck[11] output
52
57
49
PB[2]
Input/output, open drain
port B terminal 2
Port B data[2] I/O or
Ck[16] output
53
58
50
PB[3]
Input/output, open drain
port B terminal 3
Port B data[3] I/O or
PWM output
54
59
51
PA[0]
Input port A terminal 0
TestVar 1 ; Event counter
55
60
52
PA[1]
Input port A terminal 1
TestVar 2
56
61
53
PA[2]
Input port A terminal 2
TestVar 3
57
62
54
PA[3]
Input port A terminal 3
Event counter, MSC start/stop
58
63
55
Buzzer
Output Buzzer terminal
59
64
56
Strobe
Output Strobe terminal
P reset state or/and port B write
or sleep flag out
60
1
57
Vbat = V
DD
Positive power supply
MFP Connection
61
2
58
Vreg
Internal voltage regulator
Connect to minimum 100nF,
MFP connection
62
3
59
Qin/Osc1
Crystal terminal 1
32 KHz crystal, MFP connection
63
4
60
Qout /Osc2
Crystal terminal 2
32 KHz crystal, MFP connection
64
5
61
V
SS
Negative power supply
ref. terminal, MFP connection
Gray shaded areas : Terminals needed for MFP programming connections (V
DD
, Vreg, Qin, Qout, Test).
Figure 3. Typical Configuration
C r y s ta l
L C D D is p la y
C 1
C 1
C 1
C 4
C 3
V r e g
V
S S
T e s t
R e s e t
V
D D
( V b a t)
S E G [3 2 :1 ]
Q in O o u t
C 2
C 2
C 1 A
C 1 B
C 2 A
C 2 B
C O M [4 :1 ]
V L 1
V L 2
V L 3
E M 6 6 2 2
A ll C a p a c ito rs 1 0 0 n F
P o r t A
S tr o b e
B u z z e r
P o r t B
P o r t S P
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