77
Real time clock module
Specifications (characteristics)
Absolute Max. rating
Operating range
Frequency characteristics and current consumption
characteristics
DC characteristics
External dimensions
Terminal connection
RTC-72421
(Unit: mm)
23.1 Max.
3.3 Min.
0.2 Min.
6.3
4.2
1
18
2
17
3
16
4
15
5
14
6
13
7
12
8
11
9
10
RTC72421 A
EPSON 5053C
RTC72423 A
EPSON 6150
(V
DD
) and V
DD
are to have the same level of voltage
.
Do not connect it to any external terminals.
NC is not connected internally.
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
RTC-72421
RTC-72423
RTC-72423
0.05 Min.
2.8 Max.
7.62
0.25
2.5
16.3 Max.
7.9
12.2 Max.
0.2
1.0
0.3
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
STD. P
CS
0
ALE
A
0
A
1
A
2
A
3
RD
GND
WR
D
3
D
2
D
1
D
0
CS
1
(V
DD
)
(V
DD
)
V
DD
72423
STD. P
CS
0
NC
ALE
A
0
NC
A
1
NC
A
2
A
3
RD
GND
WR
D
3
D
2
D
1
NC
NC
D
0
CS
1
NC
(V
DD
)
(V
DD
)
V
DD
72421
90
to
105
0
to
10
1.27
0.35
2.54
0.65 Max.
4-bit REAL TIME CLOCK MODULE
RTC-72421/72423
Built-in crystal unit allows adjustment-free efficient operation.
ALE input terminal available for 8048, 8051, and 8085 series.
12/24 h clock switchover function and automatic leap year setting.
Interrupt masking.
30 second adjustment function.
Low current consumption and features a backup function.
Item
Power source voltage
Input and output voltage
Storage temperature
Soldering condition
Symbol
V
DD
V
I/O
T
STG
T
SOL
Condition
Ta=+25 C
Ta=+25 C
RTC-72421
RTC-72423
RTC-72421
RTC-72423
Specifications
-0.3 to 7.0
GND -0.3 to V
DD
+0.3
-55 to +85
-55 to +125
Under +260 C within 10 s
(lead part) (package should
be less than +150 C)
Twice at under +260
C within 10
s or under +230
C within 3 min.
Unit
V
C
Item
Operating voltage
Operating temperature
Data holding voltage
CSI data holding time
Operation restoring time
Symbol
V
DD
T
OPR
V
DH
t
CDR
t
R
Condition
RTC-72421
RTC-72423
Refer to the data
holding timing
Specifications
4.5 to 5.5
-10 to 70
-40 to 85
2.0 to 5.5
2.0 Min.
Unit
V
C
V
s
Item
Frequency tolerance
Frequency temperature
characteristics
Aging
Shock resistance
Current consumption
Symbol
f/fo
fa
S.R.
I
DD1
I
DD2
Ta=+25 C
V
DD
=5 V
72421 A
72421 B
72423 A
72423
Condition
Three drops on a
hard board from 750 mm
or 29400 m/s
2
x 0.3 ms x
1/2 sine wave x 3 directions
CS
1
=0 V
Exclude input/
output current
V
DD
=5 V
V
DD
=2 V
Specifications
10
50
20
50
+10/-120
5 Max.
10 Max.
10 Max.
5 Max.
Unit
x 10
-6
x 10
-6
/year
x 10
-6
A
Item
"H" input voltage (1)
"L" input voltage (1)
Input leak current (1)
Input leak current (2)
"L" output voltage (1)
"H" output voltage
"L" output voltage (2)
Off leak current
Input capacity
"H" input voltage (2)
"L" input voltage (2)
Symbol
V
IH1
V
IL1
I
LK1
I
LK2
V
OL1
V
OH
V
OL2
I
OFFLK
C
1
V
IH2
V
IL2
Condition
--
V
1
=V
DD
/0 V
I
OL
=2.5 mA
I
OH
=-400 A
I
OL
=2.5 mA
V
1
=V
DD
/0 V
Input
frequency 1 MHz
V
DD
=2 to 5.5 V
Min.
2.2
--
2.4
--
4/5 V
DD
--
Typ.
--
10
20
--
Max.
--
0.8
1
10
0.4
--
0.4
10
--
1/5 V
DD
Unit
V
A
V
A
pF
V
Applicable
terminal
All inputs
other than
CS
1
Input other
than D
0
to D
3
D
0
to D
3
STD.P
Input other
than D
0
to D
3
D
0
to D
3
CS
1
-10 C to +70 C
(+25 C reference temperature)
V
DD
=5 V, Ta=+25 C,
first year
Actual size
78
Real time clock module
CS
1
V
IH
(CS1)
V
IH
V
IH
V
IH
V
IH
V
IH
V
IH
V
IH
V
IL
V
IL
V
IL
V
IH
V
IL
V
IL
V
IL
V
IH
(CS1)
t
SU
(CS1)
t
SU
(A-ALE)
t
H
(ALE-A)
t
SU (
ALE-W)
t
SU (
D-W)
t
SU (
W-ALE)
t
SU (
R-ALE)
t
W (
ALE)
CS
0
ALE
WR
A
0
to A
3
D
0
to D
3
t
H
(CS1)
t
H (W-D)
t
W (
W)
CS
1
CS
1
CS
0
or WR not occurred
CS
1
V
IH
(CS1)
1/5V
DD
V
DD
4 V
4 V
V
IH
2
V
IH
2
V
IL
2
V
IL
2
t
CDR
t
R
V
IH
V
IH
V
OH
V
OL
V
OH
V
OL
V
IH
V
IH
V
IH
V
IL
V
IL
V
IH
V
IL
V
IL
V
IL
V
IL
V
IH
(CS1)
t
SU
(CS1)
t
SU
(A-ALE)
t
H
(ALE-A)
t
SU (
ALE-R)
t
PZV (
R-Q)
t
PVZ (
R-Q)
t
SU (
R-ALE)
t
rnc (
R)
t
W (
ALE)
CS
0
ALE
RD
A
0
to A
3
D
0
to D
3
t
H
(CS1)
2 to 4 V
Data storage mode
Interface possible
with external
terminals
Interface possible
with the external
terminals
OSC
DIVIDER
READ WRITE
CONTROL
ADDRESS LATCH
DATA BUS BUFFER
ADDRESS DECODER
RD WR CS
1
ALE
CS
0
A
0
D
0
D
1
D
2
D
3
A
1
A
2
A
3
STDP
64 H
Z
REST
STOP
30ADJ
BUSY
HOLD
CARRY PER
SEC.
CARRY PER
MIN.
CARRY PER
HOUR
4
4
4
4
4
IRQFLAG
24 /12
Seconds
Minutes
Hours
Days
Months
Years
Week
Sec 1
Sec 10 Min 1
Min 10 Hou 1 Hou 10 Day 1 Day 10 Mon 1 Mon 10 Yea 1 Yea 10
Reg D
Reg E
Reg F
Register table
Switching characteristics (with ALE)
Read mode (with ALE)
Write mode (with ALE)
Data holding timing
Block diagram
( V
DD
= 5 V
0.5 V)
0="L" level,1="H" level, REST = RESET ITRPT/ STND=INTERRUPT/STANDARD
1) Bit does not exist.
2) Please mask AM/PM bit with 10's of hours operations.
3) Busy is read only. IRQ can only. IRQ can only be set low ("O").
4)
5) TEST bit should be "O".
(Please connect ALE to V
DD
if the microprocessor does not have an ALE output.)
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
A
3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
A
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
S
1
S
10
MI
1
MI
10
H
1
H
10
D
1
D
10
MO
1
MO
10
Y
1
Y
10
W
RegD
RegE
RegF
D
3
s
8
mi
8
h
8
d
8
mo
8
y
8
y
80
30 sec.
ADJ
t
1
TEST
D
2
s
4
s
40
mi
4
mi
40
h
4
PM/AM
d
4
mo
4
y
4
y
40
w
4
IRQ
FLAG
t
0
24/12
D
1
s
2
s
20
mi
2
mi
20
h
2
h
20
d
2
d
20
mo
2
y
2
y
20
w
2
BUSY
ITRPT
/STND
STOP
D
0
s
1
s
10
mi
1
mi
10
h
1
h
10
d
1
d
10
mo
1
mo
10
y
1
y
10
w
1
HOLD
MASK
REST
Count
Value
0 to 9
0 to 5
0 to 9
0 to 5
0 to 9
0 to 2
or
0 to 1
0 to 9
0 to 3
0 to 9
0 to 1
0 to 9
0 to 6
-----
Remarks
1- second digit register
10- second digit register
1- minute digit register
10- minute digit register
1- hour digit register
PM/AM,10- hours digit register
1- day digit register
10 -day digit register
1- month digit register
10- month digit register
1- year digit register
10- year digit register
Week register
Control Register D
Control Register E
Control Register F
Item
CS
1
setup time
Address setup time before ALE
Address hold time after ALE
ALE pulse width
ALE setup time before WRITE
ALE setup time before READ
ALE setup time after WRITE
ALE setup time after READ
WRITE pulse width
DATA delay time after READ
DATA Hold time after READ
DATA setup time before WRITE
DATA hold time after WRITE
CS
1
hold time
READ/WRITE recovery time
Symbol
t
SU (CS1)
t
SU (A-ALE)
t
H (ALE-A)
t
W (ALE)
t
SU (ALE-W)
t
SU (ALE-R)
t
SU (W-ALE)
t
SU (R-ALE)
t
W (W)
t
PZV (R-Q)
t
PVZ (R-Q)
t
SU (D-W)
t
H (W-D)
t
H (CS1)
t
REC (R/W)
Condition
C
L
=150 pF
Min.
1000
50
50
80
0
0
50
50
120
----
0
80
10
1000
200
Max.
----
120
70
----
Unit
ns
Address
Register
Data Bit
1
0
PM/AM
PM
AM
ITRPT/STND
ITRPT
STND
24/12
24
12
Data
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