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Электронный компонент: S1R72003

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Technical Manual
USB2.0 Device Controller
S1R72003
MF1495-02







































NOTICE
No part of this material may be reproduced or duplicated in any form or by any means without the written
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or
due to its application or use in any product or circuit and, further, there is no representation that this material is
applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any
intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that
anything made in accordance with this material will be free from any patent or copyright infringement of a third
party. This material or portions thereof may contain technology or the subject relating to strategic products
under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export license
from the Ministry of International Trade and Industry or other approval from anther government agency.
SEIKO EPSON CORPORATION 2002, All rights reserved.

All other product names mentioned herein are trademarks and/or registered trademarks of their respective
companies.
The information of the product number change
Starting April 1, 2001 the product number has been changed as listed below. Please use the new product number
when you place an order. For further information, please contact Epson sales representative.

Configuration of product number
DEVICES
S1 R 72803 F 00A1
00






Packing specifications
Specifications
Shape (F : QFP)
Model number
Model name (
R:Exclusive use controller,Peripheral
)
Product classification (S1:Semiconductors)
EPSON
i
Contents
1. DESCRIPTION.................................................................................................................................... 1
2. FEATURES ......................................................................................................................................... 1
3. BLOCK
DIAGRAM ............................................................................................................................. 2
4. PIN
ASSIGNMENT ............................................................................................................................. 3
5. PIN
DESCRIPTION ............................................................................................................................ 4
5.1 CPU
Interface............................................................................................................................. 4
5.2 IDE/General-purpose
Port
Interface .......................................................................................... 5
5.3 USB
Interface............................................................................................................................. 6
5.4 System Blocks and Others......................................................................................................... 6
5.5 Test
Signals ................................................................................................................................ 7
5.6 Power Supply and GND............................................................................................................. 7
6. FUNCTIONAL
DESCRIPTION........................................................................................................... 8
6.1 UTMI1.0 Transceiver Macro....................................................................................................... 8
6.2 Serial Interface Engine............................................................................................................... 8
6.2.1 Packet
Handler............................................................................................................. 8
6.2.2 Transaction
Manager ................................................................................................... 8
6.2.3 Endpoints...................................................................................................................... 8
6.2.4 Suspend/Resume
Controller........................................................................................ 8
6.3 FIFO
SRAM................................................................................................................................ 8
6.4 FIFO
Controller........................................................................................................................... 8
6.5 DMA............................................................................................................................................ 8
6.6 Test/Debug
Module .................................................................................................................... 8
7. REGISTER.......................................................................................................................................... 9
7.1 Register
Map .............................................................................................................................. 9
7.2 Register
Details........................................................................................................................15
7.2.1
00h Main Interrupt Status (MainIntStat) ................................................................15
7.2.2
01h SIE Interrupt Status (SIEIntStat) ....................................................................16
7.2.3
02h Bulk Interrupt Status (BulkIntStat)..................................................................17
7.2.4
03h EPr Interrupt Status (EPrIntStat)....................................................................18
7.2.5
04h IDE Interrupt Status (IDEIntStat)....................................................................19
7.2.6
05h Reserved ........................................................................................................19
7.2.7
06h Port Interrupt Status (PortIntStat)...................................................................20
7.2.8
07h Reserved ........................................................................................................20
7.2.9
08h EP0 Interrupt Status (EP0IntStat) ..................................................................21
7.2.10
09h EPa Interrupt Status (EPaIntStat) ..................................................................22
7.2.11
0Ah EPb Interrupt Status (EPbIntStat)..................................................................23
7.2.12
0Bh EPc Interrupt Status (EPcIntStat) ..................................................................24
7.2.13
0Ch to 0Fh Reserved ...............................................................................................24
7.2.14
10h Main Interrupt Enable (MainIntEnb) ...............................................................24
7.2.15
11h SIE Interrupt Enable (SIEIntEnb) ...................................................................25
7.2.16
12h Bulk Interrupt Enable (BulkIntEnb).................................................................25
7.2.17
13h EPr Interrupt Enable (EPrIntEnb)...................................................................25
7.2.18
14h IDE Interrupt Enable (IDEIntEnb)...................................................................25
7.2.19 15h Reserved ......................................................................................................26
7.2.20
16h Port Interrupt Enable (PortIntEnb)..................................................................26
7.2.21 17h Reserved ......................................................................................................26
7.2.22
18h EP0 Interrupt Enable (EP0IntEnb) .................................................................26
7.2.23
19h EPa Interrupt Enable (EPaIntEnb) .................................................................27
7.2.24
1Ah EPb Interrupt Enable (EPbIntEnb).................................................................27
7.2.25
1Bh EPc Interrupt Enable (EPcIntEnb) .................................................................27
7.2.26
1Ch to 1Fh Reserved .............................................................................................27
7.2.27 20h Chip Reset (ChipReset) .................................................................................28
7.2.28 21h Revision Number (RevisionNum)...................................................................28
ii
EPSON
7.2.29
22h Power Management Control (PMControl)......................................................29
7.2.30 23h USB Control (USBControl).............................................................................30
7.2.31 24h USB Status (USBStatus)................................................................................31
7.2.32 25h Xcvr Control (XcvrControl) .............................................................................32
7.2.33 26h USB Test (USBTest) .......................................................................................33
7.2.34 27h Reserved ......................................................................................................34
7.2.35 28h USB Address (USBAddress)..........................................................................34
7.2.36 29h EPr Control (EPrControl)................................................................................35
7.2.37 2Ah BulkOnly Control (BulkOnlyControl) ..............................................................36
7.2.38 2Bh BulkOnly Config (BulkOnlyConfig).................................................................37
7.2.39
2Ch to 2Eh Reserved .............................................................................................37
7.2.40 2Fh Chip Config (ChipConfig) ...............................................................................38
7.2.41
30h to 37h EP0 Setup0 to EP0 Setup7 (EP0Setup_0 to EP0Setup_7) ...............39
7.2.42 38h FrameNumber High (FrameNumber_H) ........................................................39
7.2.43 39h FrameNumber Low (FrameNumber_L)..........................................................40
7.2.44
3Ah to 3Fh Reserved .............................................................................................40
7.2.45 40h EP0 Config_0 (EP0Control_0) .......................................................................41
7.2.46 41h Reserved ......................................................................................................41
7.2.47 42h EP0 Control_0 (EP0Control_0) ......................................................................42
7.2.48 43h EP0 Control_1 (EP0Control_1) ......................................................................43
7.2.49 44h Reserved ......................................................................................................43
7.2.50
45h EP0 FIFO Remain (EP0FIFORemain)...........................................................43
7.2.51 46h EP0 FIFOforCPU (EP0FIFOforCPU) .............................................................44
7.2.52
47h EP0 FIFO Control (EP0FIFOControl).............................................................44
7.2.53
48h to 4Fh Reserved ..............................................................................................44
7.2.54 50h EPa Config_0 (EPaConfig_0).........................................................................45
7.2.55 51h EPa Config_1 (EPaConfig_1).........................................................................46
7.2.56 52h EPa Control_0 (EPaControl_0) ......................................................................47
7.2.57 53h EPa Control_1 (EPaControl_1) ......................................................................48
7.2.58
54h EPa FIFO Remain High (EPaFIFORemain_H)..............................................48
7.2.59
55h EPa FIFO Remain Low (EPaFIFORemain_L) ...............................................48
7.2.60
56h EPa FIFO for CPU (EPaFIFOforCPU) ...........................................................49
7.2.61
57h EPa FIFO Control (EPaFIFOControl).............................................................49
7.2.62 58h EPb Config_0 (EPbConfig_0).........................................................................50
7.2.63 59h EPb Config_1 (EPbConfig_1).........................................................................51
7.2.64 5Ah EPb Control_0 (EPbControl_0)......................................................................52
7.2.65 5Bh EPb Control_1 (EPbControl_1)......................................................................53
7.2.66
5Ch EPb FIFO Remain High (EPbFIFORemain_H) .............................................53
7.2.67
5Dh EPb FIFO Remain Low (EPbFIFORemain_L)...............................................53
7.2.68 5Eh EPb FIFO for CPU (EPbFIFOforCPU)...........................................................54
7.2.69 5Fh EPb FIFO Control (EPbFIFOControl) ............................................................54
7.2.70 60h EPc Config_0 (EPcConfig_0).........................................................................55
7.2.71 61h EPc Config_1 (EPcConfig_1).........................................................................56
7.2.72 62h EPc Control_0 (EPcControl_0) ......................................................................57
7.2.73 63h EPc Control_1 (EPcControl_1) ......................................................................58
7.2.74
64h EPc FIFO Remain High (EPcFIFORemain_H) ..............................................58
7.2.75
65h EPc FIFO Remain Low (EPcFIFORemain_L)................................................58
7.2.76
66h EPc FIFO for CPU (EPcFIFOforCPU)............................................................59
7.2.77 67h EPc FIFO Control (EPcFIFOControl).............................................................59
7.2.78
68h Iso Max Packet Size High (IsoMaxSize_H) ...................................................59
7.2.79
69h Iso Max Packet Size Low (IsoMaxSize_L).....................................................60
7.2.80
6Ah to 7Fh Reserved .............................................................................................60
7.2.81 80h IDE Status (IDEStatus)...................................................................................60
7.2.82 81h IDE Config_0 (IDEConfig_0) ..........................................................................61
7.2.83 82h IDE Config_1 (IDEConfig_1) ..........................................................................62
7.2.84 83h Reserved ......................................................................................................64
7.2.85 84h IDE Register Mode (IDE_Rmod)....................................................................64