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Электронный компонент: S1X5

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Rev. 0.8
1
S1X50000 Series
s
DESCRIPTION
S1X50000 is an embedded array product series with a built-in flash/SRAM macro mounted adopting the CMOS
0.35
m process. With a flash/SRAM macro mounted, it will realize the same development time as you need to
develop gate arrays after you have finished designing circuits. The Series is available in four models, which
have different FlashROM sizes. By mounting a soft macro on them, you can develop your own ASIC with the
built-in flash. S1X58063 allows you to mount our 32bit RISC MCU (S1C33000 core) on it. Using this, you can
develop your own MCU with a built-in FlashROM.The internal gates and I/O cell are rated at 3.3V and 3.3/5.0V,
respectively, to be compatible with a wider range of power source, so you can use the product with a single-
voltage or two-voltage power source. On top of that, the Series has the output cell with a low noise at a
A
order. Two types of internal cells are available, that is, the low-power-consumption and high-speed types. You
can also utilize the assets of your S1L50000 Series for the high-speed type.
s
FEATURES
q
SRAM/FlashROM mounted (FlashROM' capacity: 2Mbit, 1Mbit, 512Kbit)
q
High-speed type (Internal gates' delay: 0.14ns standard at 3.3V. Power consumption: 0.70
W/MHz/BC)
Low-power-consumption type (Internal gates' delay: 0.14ns standard at 3.3V. Power consumption: 0.39
W/MHz/BC)
q
Selectable power voltage (3.3V single or mixed 3.3V/5.5V)
q
High driving capacity (IOL=1, 2, 6, 12 mA at 3.3V)
q
Various soft macros mountable (USB 1.1, IrDA, PLL, Peripheral, etc.)
q
S1C33000 core mountable on S1X58063 (60MIPS/50MHz/3.3V(Max.))
High Density Embedded Array built-in Flash Macro
S1X50000 Series
PF1225-01
s
LINE-UP
q
Embedded array with a built-in flash/SRAM macro mounted
q
High-speed/low-power-consumption type cell used
q
Allows to mount various types of soft macros
q
Four models available with different sizes of flash/SRAMs mounted
q
S1C33 (EPSON's original 32bit RISC MCU) mountable on S1X58063
Series name
S1X50000Series
Model name
S1X58033
S1X58043
S1X58063
S1X58093
Number of gates mounted
118K
293K
297K
58K
Number of gates usable
89K
117K
118K(
*
1:20K)
40K
AL layer
3
3
3
3
Cell type
High speed
Low power consumption Low power consumption
High speed
Number of pads
208
208
208
184
Built-in macro
1P SRAM's capacity
128Kbit
64Kbit
32Kbit
FlashROM's capacity
2Mbit
512Kbit
1Mbit
512Kbit
Others
C33_A/D
S1C33000 core (32bit RISC MCU)
*
1 Shows the number of the usable gates when the S1X58063 has the S1C33000 core mounted.
The libraries for the high-speed type and the low-power-consumption type cells are different. It you want them,
please tell which type you want to our sales.
2
Rev. 0.8
S1X50000 Series
s
CONFIGURATION OF THE MEMORY MOUNTED
The configuration of the SRAM/FlashROMs mounted on each model is as follows (words
bit width
chips):
High-speed Sync. 1P SRAM
FlashROM
S1X58033
128Kword
16bit
1pcs
S1X58043
2Kword
8bit
8pcs
32Kword
16bit
1pcs
S1X58063
2Kword
32bit
1pcs
32Kword
16bit
2pcs
S1X58093
4Kword
8bit
1pcs
64Kword
8bit
1pcs
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FEATURES OF THE FLASHES MOUNTED
The features of the FlashROM macro mounted on each model are as follows:
Model
S1X58083
S1X58043/S1X58063
S1X58093
Configuration of FlashROM mounted (words x bits)
128Kword
16bit
32Kword
16bit
64Kword
8bit
Sector size
512-Word/Sector
1K-Byte/Sector
Unit of erasing
Erasing by chip or sector
Unit of writing
Word
Byte
Time for erasing/ Time for erasing the whole chip
100mS(Typ.)
writing
Time for erasing a sector
20mS(Typ.)
Time for writing a byte
15
S(Typ.)
Operational conditions
Power voltage
3.0 to 3.6V
Operational temperature
0 to 70C
Access time
50nS(Max.)
Current consumption whenoperating
20mA(Max.)
15mA(Max.)
(reading)
(Vcc=Vccmax,f=1/tRCmin,Iout=0mA)
(Vcc=Vccmax,f=1/tRCmin,Iout=0mA)
I/F for erasing/writing
Light-pulse input type
Reliability
Number of times of erasing/writing
10,000 times (Typ.)
Period for which data can be kept
Ten years (Min.)
(This product is licensed by Silicon Storage Technology, Inc.)
You are required to configure the FlashROM's writing circuit with your own circuit. We have a separate
FlashROM data-sheet; please contact our Sales for it.
s
SUMMARY SPECIFICATIONS OF S1C33000 CORE (MOUNTABLE ON S1X58063)
Item
Description
Command set
DC to 50MHz(50MIPS)
Fixed 16-bit length, 105 basic commands
Memory space
256 Mbytes (28bit) linear space with the shared command codes, data and I/O
External bus interface
Configures with the memory area divided into fifteen. Directly connectable to an external memory.
Interruption
Reset, NMI, external interruptions (128 Max.), software interruptions (4), exceptions of command execution (2)
If you want to have an S1C33000 built-in, please contact our Sales.
Rev. 0.8
3
S1X50000 Series
s
FLASH MACRO BLOCK CHART
Low decoder
Flash memory array
(2M(256K
8bit)Bit)
Column decoder
Colum multiplex
High-voltage
generation circuit
Control logic
Test mode register
Sense up
Input logic
A7<17:7>
AA<6:0>
POR#
CE#
OE#
PRG
CHPERS
SECERS
Test signals(
*
1 )
(
*
1: Test signals are: TM0, TM1, TVEP, TZVDD1, TIPRG, TVREF, and TIREF.
The TVEP must be always connected to an external terminal.)
DDO<7:0> DDI<7:0>
s
PACKAGE LINE-UP
The table below shows the line-up of the packages the S1X50000 Series supports. For other packages, please
contact our Sales.
Model
Compatible package
S1X58033
QFP5-100,128/QFP8-128,160,208/QFP14-80
QFP15-100,128/QFP20-144,184/QFP21-176,216
QFP22-208/QFP23-240/TQFP15-100,128
HQFP8-160
S1X58043
(QFP18-176)
S1X58063
QFP5-128/QFP8-208/QFP20-184
S1X580903
More packages will be added as they become ready.
As of May 31, 2001
4
Rev. 0.8
S1X50000 Series
ELECTRONIC DEVICES MARKETING DIVISION
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson
reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any
inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this
material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights
is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free
from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to
strategic products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export license from the Ministry
of International Trade and Industry or other approval from another government agency.
Seiko Epson Corporation 2001, All rights reserved.
All other product names mentioned herein are trademarks and/or registered trademarks of their respective companies.
First issue July, 2001
H
IC Marketing & Engineering Group
ED International Marketing Department
Europe & U.S.A
421-8 Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: 0425875812 FAX: 0425875564
ED International Marketing Department
Asia
421-8 Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: 0425875814 FAX: 0425875110
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EPSON Electronic Devices Website
http://www.epson.co.jp/device/
Printed in Japan
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SOFT MACRO CELLS
Like S1L50000 Series, the S1X50000 Series allows you to mount a soft macro on it. The soft macro is mounted
on the usable BCs of the Series. However, you can not mount the soft macro for the low-power-consumption-
type cell on the embedded array which uses a cell with the usable gates of the high-speed type, and vice versa.
Please use the soft macro which uses the same type of the cell as the internal cell.
This manual was made with recycle paper,
and printed using soy-based inks.
Peripheral
DMA (EIF37)
RTC (EIF42)
USART (EIF51)
Programable general-purpose
timer (EIF54)
I/O port (EIF55)
Interruption controller (EIF59)
UART + FIFO (EIF65)
I/O cell
Internal cell
(available gates)
USB1.1FC
IrDA1.1
SS
S1D13501(LCDC)
S1D13502(LCDC)
Interface/LCDC
Variable output/Low noise/High speed/PCI/Proof voltage:
5V/Gated control
I/O buffer
PLL for multiplication (
*
1)
PLL for phase adjestment (
*
1) (
*
2)
PLL
Asynchronous 1-port SRAM
Asynchronous 2-port SRAM
G/A SRAM
Connected SRAM
or
mounted FlashROM
(
*
1) Under consideration
(
*
2) Under development
The PLL has some difference in the way to secure the mounting area from other soft macros. If you want it built-in, please contact our Sales.