1
PBL 403 10
March 2001
3.5 V GSM 900 MHz Power Amplifier
PBL 403 10
Description.
The PBL 40310 is a highly integrated single-ended silicon MMIC power amplifier
intended for use in GSM terminals. It delivers 35 dBm at 900 MHz with 55 % power added
efficiency into a 50
unbalanced load using a single 3.5 V supply.
The circuit has an analog ramp signal to control output power level and a logical on/
off signal for power down mode. It can be used in dual-band amplifiers using the band
select logical signal. It can be operated up to 50 % duty cycle with minimum performance
degradation. The circuit is housed in a specially designed QSOP16 (150 mil body)
package and the implementation requires only few external components.
25 GHz f
t
state-of-the-art deep trench isolated double-poly silicon bipolar process
with additional features for improved wireless performance has been used. On-chip
capacitors and inductors are used for the integrated internal matching network. Special
front-side metallized substrate contacts provide excellent ground paths from active
devices to the highly doped semiconductor substrate and package ground.
Key features.
2.7 to 5.0 V single supply operation
35 dBm output power at 3.5 V
55 % Power Added Efficiency
Input matched to 50
Complete on chip input and
interstage matching
Analog power control
Less than 10
A current
consumption in power down mode
Proven RF Silicon Technology
Reliability
Minimum number of external
components for low overall solution
cost
Figure 1. Block diagram.
Advance information
Figure 2. Package outlook.
RFin
V
CC
Power
Control
RFout
B
SEL
BIAS
TX - ON
PBL 40310
2
PBL 403 10
Parameter
Conditions
Symbol
Min.
Typ.
Max.
Unit
Supply voltage, continuous
V
CC
-0.5
6.0
V
Power control voltage
V
APC
-0.5
6.0
V
Input power
P
IN
+20
dBm
Operating Case Temperature
T
OP
-40
+85
C
Storage Temperature Range
T
STORAGE
-30
+100
C
V
CC
= 3.5 V, T
A
= + 25
C unless otherwise stated.
Parameter
Conditions
Symbol
Min.
Typ.
Max.
Unit
Supply voltage range
V
CC
2.7
5.0
V
Supply current
V
APC
= 2.5 V, no RF signal applied
I
CC
150
mA
Standby supply current
V
APC
<=0.5 V, TX-ON=HIGH
I
STBY
3.0
mA
Power down leakage current
V
APC
<= 0.5 V, TX-ON=LOW
I
LEAK
5.0
A
Input current, V
APC
0 < V
APC
< 3.5 V
2.0
3.0
mA
V
CC
= 3.5 V, f
IN
= 900 MHz, P
IN
= 8 dBm, V
APC
= 2.5 V, TX-ON = high (V
CC
), B
SEL
= low (GND), duty cycle = 12.5 %,
pulse width = 577
s, T
A
= +25
C unless otherwise stated. All data measured on evaluation board.
Parameter
Conditions
Symbol
Min.
Typ.
Max.
Unit
Frequency range
f
IN
880
915
MHz
Input impedance
Z
IN
50
Input VSWR
P
IN
= -10 to +20 dBm
VSWR
2:1
Recommended input power
P
IN
8.0
12.0
dBm
Power gain P
IN
= 0 dBm
G
P
30
31
dB
Output power
P
OUT
34.5
35
dBm
Power added efficiency
50
55
%
Output power
V
CC
= 2.9 V
P
OUT
33
dBm
2
nd
harmonic
2 fo
tbd
dBc
3
rd
harmonic
3 fo
tbd
dBc
Output Noise
RBW=100 kHz, f=925 to 935 MHz
tbd
dBm
Output Noise
RBW=100 kHz, f=925 to 960 MHz
tbd
dBm
Forward isolation
V
APC
< 0.5 V, P
IN
= -10 to + 10 dBm
-25
dB
Stability, load VSWR
All phases, no oscillations.
VSWR
6:1
Ruggedness, load VSWR
All phases, no damage.
VSWR
10:1
Power control for max. P
OUT
V
APC
2.5
V
Power control for min. P
OUT
P
OUT
< -30 dBm
V
APC
0.5
V
Power control slope
-10 dBm < P
OUT
< 35 dBm
tbd
tbd
dB/V
This document contains advance information of a new product. Data given in this document shall be considered as preliminary
and may be changed without notice.
Maximum Ratings
DC Electrical Characteristics
AC Electrical Characteristics
3
PBL 403 10
Figure 3. Pin configuration.
Pin Descriptions:
Refer to pin configuration.
SO
Name
Function SO Name
Function
1
Vcc
Supply voltage
9
GND
Common ground
2
Vcc
Supply voltage
10
GND
Common ground
3
GND
Common ground
11 GND
Common ground
4
RFin
RF input
12 RFout
RF output
5
GND
Common ground 13 RFout
RF output
6
TX-ON
Transmit ON
14 GND
Common ground
7
B
SEL
Band select
15
GND
Common ground
8
V
APC
Power control voltage
16 GND
Common ground
1
2
3
4
5
6
7
8
16
15
14
13
GND
Vcc
GND
GND
GND
RFin
RFout
GND
9
12
10
11
RFout
GND
GND
Vcc
B
SEL
TX-ON
V
APC
GND
Figure 4. RF performance.
Figure 5. Evaluation setup including network for unbalanced
input/output.
0
5
10
15
20
25
30
35
40
-10
-5
0
5
10
15
Pin (dBm)
Pout [dBm], Gain (dB)
Eff (%)
0
10
20
30
40
50
60
70
80
Output power (dBm)
Gain (dB)
Efficiency (%)
RFin
V
CC
Power
Control
RFout
BIAS
TX-ON
B
SEL
1
2
4
6
7
8
12
13
Common ground
4
PBL 403 10
Specifications subject to change without
notice.
1522-PBL 403 10 Uen Rev.A
Ericsson Microelectronics AB
March 2001
Information given in this data sheet is believed to be accurate and reliable. However no responsibility is assumed
for the consequences of its use nor for any infringement of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Ericsson
Microelectronics AB. These products are sold only according to Ericsson Microelectronics AB's general conditions
of sale, unless otherwise confirmed in writing.
Ericsson Microelectronics AB
S-164 81 Kista-Stockholm, Sweden
Telephone: (08) 757 50 00
www.ericsson.se/microe
L
C
45 deg.
A1
A
D
e
H
E
B
Pin no 1
Dim.
inches
millimeters
min.
max.
min.
max.
A
B
C
D
E
H
L
1.35
0.532
0.21
0.19 0.25 0.0075 0.0098
9.80 9.98
0.386 0.393
3.99
0.157
5.70
6.20
0.2284 0.2240
0.41
1.27
0.016
0.050
1.75
0.688
0.31 0.008 0.012
3.81
0.150
= 0-8
deg.
A1
e
0.10
0.25
0.004
0.0098
0.635mm 0.025 inch ref.
Package drawing, QSOP 16
Note: This package has been chosen as a preliminary package. It will possibly be changed to a smaller solution.
This document contains advance information of a new product. Data given in this document shall be considered as preliminary
and may bechanged without notice.
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