Description
The HA118144AF i s a bipol ar IC that wa s
developed to perform the analog signal processing
between the CCD and the ADC in a CCD camera,
and is optimal for use in CCD camera digital signal
processing systems.
Functions
Correlated double sampling
AGC
Sample and hold
Gain select
Knee processing
Serial interface control
Features
Excellent suppression of CCD output lowe r
frequency noise by using clamp-type correlated
double sampling.
A high S/N ration by using dual (pre- and
post-) AGC amplifi e rs and high sensitiv i t y
based on increased coverage.
P rovides compensation for IC va ri ations and
imaging device sensitivity variations with an 8
state gain select circuit.
Allows the AGC, gain select, and knee control
to be controlled f rom the system m icr o-
processor over a serial interface.
1
HA118144AF
Video Camera CDS/AGC IC
Pin Arrangement
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
48
47
46
45
44
43
42
41
40
39
38
37
13
14
15
16
17
18
19
20
21
22
23
24
NC
KNP
CND4
NC
CP
NC
V
CLM
SO2
SO1
GND9
NC
NC
SIN
NC
V
V
V
V
SOA1
SIA2
V
NC
S/N
NC
SCK
SDATA
NC
INJECT
NC
SP1
SP2
GND1
NC
VDC
NC
NC
V
SPRE
NC
GND3
NC
OSC
V
BLK
OBP
GND2
NC
CLM
FB1
CC1
CC2
AGC
FB2
CC9
CC3
HA118144AF
(top view)
2
HA118144AF
HA118144AF
Pin Functions
Stan-
Pin
Pin
dard DC Signal Signal
No.
Name
Signal
Voltage Type
Level
Impedance Function Description
1
NC
2
KNP
Knee pulse
Pulse
5V
PP
30 k
Knee pulse input (unused).
Fix at the low level.
3
GND4
GND for IIL
0 V
GND = 0 V
interface
4
NC
5
CP
Clamp pulse
CP
5V
PP
Base
Clamp pulse input (unused).
pulse
Fix at the low level.
6
NC
7
V
CLM
Clamp input
DC
Base
Clamp input (unused).
Fix at the low level.
8
CLM
Clamp output
DC
Emitter
Clamp output (unused).
Leave open.
9
SO2
Signal output 2
5.4 V
Video 1.5V
PP
Emitter
Signal output 2
signal
10
SO1
Signal output 1
3.3 V
Video 1.5V
PP
Emitter
Signal output 1
signal
11
GND9
GND for 9 V
0 V
GND = 0 V
12
NC
13
NC
14
V
CC9
V
CC
for 9 V
9 V
Power supply +9 V
15
SPRE
Signal preview
1.3 V
Video 385 mV
PP
Emitter
Signal preview.
signal
For use as an output monitor.
16
NC
17
GND3
GND for IIL
0 V
GND = 0 V
18
NC
19
OSC
Oscillator
1.7 V
DC
5 k
Oscillator correction pin for the
correction
AGC DAC bias circuit.
Connect to GND through a
0.1 F capacitor.
20
V
CC3
V
CC
for IIL
5 V
Power supply +5 V
interface
21
BLK
Blanking pulse
BLK
5V
PP
Base
Blanking pulse input. The
signal
output is clipped at the BLK
level when a low level is input.
22
OBP
Optical black
OBP
5V
PP
40 k
Optical black pulse input.
pulse
signal
The feedback clamp operates
when a high level is input.
3
HA118144AF
HA118144AF
Pin Functions (cont)
Stan-
Pin Pin
dard DC Signal Signal
Im-
No.
Name
Signal
Voltage Type
Level
pedance
Function Description
23
GND2
GND for AGC,
0 V
GND = 0 V
knee, BLK, DAC
24
NC
25
S/N
S/N correction
3.1 V
DC
Base
AGC 1 bias circuit noise
correction pin. Connect to
GND through a 0.1 F
capacitor.
26
NC
27
V
FB2
AGC2 feed back 2.4 V
DC
Collector
AGC2 feedback output.
out
Connect to SIA2.
28
SIA2
AGC2 input
2.4 V
Video 370 mV
PP
Base
AGC2 input. Connect to SOA1
signal
through a 0.1 F capacitor.
29
SOA1
AGC1 output
2 V
Video 370 mV
PP
Emitter
AGC1 output. Connect to
signal
SIA2 through a 0.1 F
capacitor.
30
V
AGC
AGC1 control
2.5 V to DC
Diode
AGC control voltage output.
out
3.3 V
Connect to GND through a
0.1 F capacitor.
31
V
CC2
V
CC
for AGC,
5 V
Power supply +5 V
knee, BLK, DAC
32
V
CC1
V
CC
for gain
5 V
Power supply +5 V
select, CDS
33
V
FB1
AGC1 feed
2.3 V
DC
Base
AGC1 feedback output.
back out
Connect to GND through a
0.1 F capacitor.
34
NC
35
SIN
Signal input
2.3 V
Video 115 mV
PP
to Base
Signal input from the CCD
380 mV
PP
sensor
36
NC
37
NC
38
V
DC
Bias for FBC
3.5 V
DC
10 k
Gain select bias voltage
output. Connect to GND
through a 0.1 F capacitor.
39
NC
40
GND1
GND for gain
0 V
GND = 0 V
select, CDS
4
HA118144AF
HA118144AF
Pin Functions (cont)
Stan-
Pin Pin
dard DC Signal Signal
No.
Name
Signal
Voltage Type
Level
Impedance Function Description
41
SP2
Sample & hold
S&H
5 V
PP
10 k
Signal period sample and hold
pulse 2
pulse
pulse. Duty = 25%, phase
difference = 180 (with respect
to SP1).
42
SP1
Sample & hold
S&H
5 V
PP
10 k
Field through period clamp
pulse 1
pulse. Duty = 25%, phase
difference = 180 (with respect
to SP2).
43
NC
44
INJECT IIL injector
0.7 V
DC
2.46 mA
Bias current pin for internal
logic circuits. Leave open.
45
NC
46
SDATA
Serial data
Pulse
5 V
PP
30 k
Serial data input pin
input
47
SCK
Serial data
Pulse
5 V
PP
30 k
Serial clock pin. Period of
clock
2 s to 20 s.
48
NC
5
HA118144AF
HA118144AF
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