1
AUG-18-2001
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P01N02LMB
SOT-23 (M3)
NIKO-SEM
ABSOLUTE MAXIMUM RATINGS (T
C
= 25 C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
LIMITS
UNITS
Gate-Source Voltage
V
GS
15
V
T
C
= 25 C
1.2
Continuous Drain Current
T
C
= 100 C
I
D
1.0
Pulsed Drain Current
1
I
DM
12
A
T
C
= 25 C
0.6
Power Dissipation
T
C
= 100 C
P
D
0.5
W
Operating Junction & Storage Temperature Range
T
j
, T
stg
-55 to 150
Lead Temperature (
1
/
16
" from case for 10 sec.)
T
L
275
C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
MAXIMUM
UNITS
Junction-to-Case
R
JC
65
Junction-to-Ambient
R
JA
230
C / W
1
Pulse width limited by maximum junction temperature.
ELECTRICAL CHARACTERISTICS (T
C
= 25 C, Unless Otherwise Noted)
LIMITS
PARAMETER
SYMBOL TEST
CONDITIONS
MIN TYP MAX
UNIT
STATIC
Drain-Source Breakdown Voltage
V
(BR)DSS
V
GS
= 0V, I
D
= 250
A
25
Gate Threshold Voltage
V
GS(th)
V
DS
= V
GS
, I
D
= 250
A
0.7 1.0 2.5
V
Gate-Body Leakage
I
GSS
V
DS
= 0V, V
GS
= 15V
250
nA
V
DS
= 20V, V
GS
= 0V
25
Zero Gate Voltage Drain Current
I
DSS
V
DS
= 20V, V
GS
= 0V, T
J
= 125 C
250
A
On-State Drain Current
1
I
D(ON)
V
DS
= 10V, V
GS
= 10V
1.2
A
V
GS
= 7V, I
D
= 1.2A
220
250
Drain-Source On-State Resistance
1
R
DS(ON)
V
GS
= 10V, I
D
= 1.2A
180
220
m
Forward Transconductance
1
g
fs
V
DS
= 20V, I
D
= 1.2A
16
S
PRODUCT SUMMARY
V
(BR)DSS
R
DS(ON)
I
D
25V
180m
1.2A
1. GATE
2. DRAIN
3. SOURCE
G
D
S
2
AUG-18-2001
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P01N02LMB
SOT-23 (M3)
NIKO-SEM
DYNAMIC
Input Capacitance
C
iss
120
Output Capacitance
C
oss
100
Reverse Transfer Capacitance
C
rss
V
GS
= 0V, V
DS
= 15V, f = 1MHz
85
pF
Total Gate Charge
2
Q
g
11
Gate-Source Charge
2
Q
gs
3.0
Gate-Drain Charge
2
Q
gd
V
DS
= 0.5V
(BR)DSS
, V
GS
= 10V,
I
D
= 1A
5.8
nC
Turn-On Delay Time
2
t
d(on)
7
Rise Time
2
t
r
V
DS
= 15V, R
L
= 1
20
Turn-Off Delay Time
2
t
d(off)
I
D
1A, V
GS
= 10V, R
GS
= 50
13
Fall Time
2
t
f
19
nS
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (T
C
= 25 C)
Continuous Current
I
S
1.2
Pulsed Current
3
I
SM
12
A
Forward Voltage
1
V
SD
I
F
= I
S
, V
GS
= 0V
1.3
V
Reverse Recovery Time
t
rr
70
nS
Reverse Recovery Charge
Q
rr
I
F
= I
S
, dl
F
/dt = 100A /
S
0.22
C
1
Pulse test : Pulse Width
300
sec, Duty Cycle
2
.
2
Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.
REMARK: THE PRODUCT MARKED WITH "102B"
3
AUG-18-2001
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
P01N02LMB
SOT-23 (M3)
NIKO-SEM
SOT-23 (M3) MECHANICAL DATA
mm
mm
Dimension
Min. Typ. Max.
Dimension
Min. Typ. Max.
A
0.95
H 0.10 0.15 0.25
B 2.60
2.80
3.00 I 0.37
C
1.40
1.60
1.80
J
D
2.70
2.90
3.10
K
E
1.00
1.10
1.30
L
F
0.00
0.10
M
G
0.35
0.40
0.50
N
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