Et r onT ech
EM565161
Etron Technology, Inc.
No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C.
TEL: (886)-3-5782345
FAX: (886)-3-5778671
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.
512K x 16 Low Power SRAM
Preliminary, Rev 0.9 01/2002
Features
Single Power Supply Voltage, 2.3 ~ 3.6 V
Power Down Features Using CE1#, CE2, LB# and
UB#
Low Power Dissipation
Data retention Supply Voltage: 1.0V to 3.6V
Direct TTL Compatibility for All Input and Output
Wide Operating Temperature Range: -40
C to 85
C
Standby current (maximum) @ VDD = 3.6 V
I
DDS2
Part Number
Typical Maximum
EM565161BA/BJ-55
2
A 35
A
EM565161BA/BJ-70
2
A 25
A
EM565161BA/BJ-55E/70E
14
A 80
A
Ordering Information
Part Number
Speed
I
DDS2
Package
EM565161BJ-70 70
ns 25
A
6x9 BGA
EM565161BA-70 70
ns 25
A
8x10 BGA
EM565161BA-70E 70
ns 80
A
8x10 BGA
EM565161BJ-55 55
ns 35
A
6x9 BGA
EM565161BA-55 55
ns 35
A
8x10 BGA
EM565161BA-55E 55
ns 80
A
8x10 BGA
Overview
Pin Assignment
48-Ball BGA (CSP), Top View
1
2
3
4
5
6
A
B
C
D
E
F
G
H
L B #
O E #
A 0
A 1
A 2
C E 2
A 8
A 9
A 1 0
A 1 1
N C
D Q 1 5
N C
A 1 2
A 1 3
W E #
D Q 7
D Q 1 4
D Q 1 3
A 1 4
A 1 5
D Q 5
D Q 6
V D D
D Q 1 2
A 1 6
D Q 4
G N D
D Q 8
U B #
A 3
A 4
C E 1 #
D Q 0
D Q 9
D Q 1 0
A 5
A 6
D Q 1
D Q 2
G N D
D Q 1 1
A 1 7
A 7
D Q 3
V D D
A 1 8
G N D
Pin Names
Symbol Function
A0 A18
Address Inputs
DQ0-DQ15 Data
Inputs/Outputs
CE1#,CE2
Chip Enable Input
OE# Output
Enable
WE#
Read/Write Control Input
LB#,UB#
Data Byte Control Inputs
GND Ground
V
DD
Power Supply
NC No
Connection
The EM565161 is an 8M-bit SRAM organized as 512K words by 16 bits. It is designed with advanced CMOS
technology. This Device operates from a single power supply. Advanced circuit technology provides both high
speed and low power. It is automatically placed in low-power mode when CE1# or both UB# and LB# are
asserted high or CE2 is asserted low. There are three control inputs. CE1# and CE2 are used to select the
device and for data retention control, and output enable (OE#) provides fast memory access. Data byte control
pin (LB#,UB#) provides lower and upper byte access. This device is well suited to various microprocessor
system applications where high speed, low power and battery backup are required. And, with a guaranteed
operating range from 40
C to 85
C, the EM565161 can be used in environments exhibiting extreme
temperature conditions.
Et r onT ech
EM565161
Preliminary
2
Rev 0.9
Jan 2002
Block Diagram
A 0
A 1 8
V D D
G N D
M E M O R Y
C E L L A R R A Y
5 1 2 k x 1 6
C OL U M N A DD R ES S
D EC OD ER
S E N S E
A M P
C E 2
C E 1 #
L B #
O E #
W E #
U B #
D Q0
D Q1
D Q2
D Q3
D Q4
D Q5
D Q6
D Q7
D Q8
D Q9
D Q1 0
D Q1 1
D Q1 2
D Q1 3
D Q1 4
D Q1 5
P OW ER D OW N
C IR C UIT
Et r onT ech
EM565161
Preliminary
3
Rev 0.9
Jan 2002
Operating Mode
Mode CE1#
CE2
OE#
WE#
LB#
UB#
DQ0~DQ7
DQ8~DQ15
Power
L L DOUT
DOUT
IDDO
H L High-Z DOUT
IDDO
Read
L H L H
L H DOUT High-Z IDDO
L L
DIN
DIN
IDDO
H L High-Z
DIN
IDDO
Write L
H
X
L
L H
DIN High-Z IDDO
L H H H X X High-Z High-Z
IDDO
Output Disabled
L H X X H H High-Z High-Z
IDDO
H X X X X X
X L X X X X
Standby
X X X X H H
High-Z High-Z
IDDS
Note:X=don't care. H=logic high. L=logic low.
Absolute Maximum Ratings
Supply voltage, VDD
-0.3 to +4.6V
Input voltages, VIN
-0.3 to +4.6V
Input and output voltages, VI/O
-0.5 to VDD +0.5V
Operating temperature, TOPR
-40 to +85
C
Storage temperature, TSTRG
-55 to +150
C
Soldering Temperature (10s), TSOLDER
240
C
Power dissipation, PD 1
W
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EM565161
Preliminary
4
Rev 0.9
Jan 2002
DC Recommended Operating Conditions (Ta=-40
C to 85
C)
Symbol Parameter
Min
Typ
Max
Unit
VDD
Power Supply Voltage
2.3
3.0
3.6
V
VIH
Input High Voltage
2.2
-
VDD + 0.3
(1)
VIL
Input Low Voltage
-0.3
(2)
-
0.6
VDR
Data Retention Supply Voltage
1.0
-
3.6
Note:
(1) Overshoot : VDD +2.0V in case of pulse width
20ns
(2) Undershoot : -2.0V in case of pulse width
20ns
DC Characteristics
(Ta = -40
C to 85
C, VDD = 2.3V to 3.6V)
Parameter Symbol
Test
Conditions
Min
Typ*
Max
Unit
Input low current
IIL
IIN = 0V to VDD -
1
-
1
A
Output low
voltage
VOL
IOL = 2.1 mA
-
-
0.4 V
Output high
voltage
VOH
IOH = -1.0 mA
VDD
0.15
-
-
V
Operating current
IDD1
CE1# = VIL and
CE2 = VIH and
Cycle time = min
-
12 35
IDD2
IOUT = 0mA
Other Input = VIH / VIL
Cycle time = 1
s
-
-
5
mA
Standby current
IDDS1 CE1# = VIH or CE2 = VIL
-
-
0.3 mA
-55
-
2 35
IDDS2
CE1# = VDD 0.2V or
UB# and LB# = VDD-0.2V or
CE2 = 0.2V
-70
-
2 25
A
-55E/70E
-
14 80
Notes:
* Typical value are measured at T
a
= 25
C.
Capacitance (Ta = 25
C; f = 1 MHz)
Parameter Symbol
Min
Max
Unit
Test
Conditions
Input capacitance
CIN
-
8 pF VIN = GND
Input/Output capacitance
CIO
-
10 pF
VIO = GND
Notes: This parameter is periodically sampled and is not 100% tested.
Et r onT ech
EM565161
Preliminary
5
Rev 0.9
Jan 2002
AC Characteristics and Operating Conditions (Ta = -40
C to 85
C, VDD = 2.3V to 3.6V)
Read Cycle
EM565161
-55 -70
Symbol Parameter
Min Max Min Max
Unit
tRC
Read cycle time
55
-
70
-
tAA
Address access time
-
55
-
70
tCO1
Chip Enable (CE1#) Access Time
-
55
-
70
tCO2
Chip Enable (CE2) Access Time
-
55
-
70
tOE
Output enable access time
-
25
-
35
tBA
Data Byte Control Access Time
-
55
-
70
tLZ
Chip Enable Low to Output in Low-Z
10
-
10
-
tOLZ
Output enable Low to Output in Low-Z
5
-
5
-
tBLZ
Data Byte Control Low to Output in Low-Z
10
-
10
-
tHZ
Chip Enable High to Output in High-Z
-
20
-
25
tOHZ
Output Enable High to Output in High-Z
-
20
-
25
tBHZ
Data Byte Control High to Output in High-Z
-
20
-
25
tOH
Output Data Hold Time
10
-
10
-
ns
Write Cycle
EM565161
-55 -70
Symbol Parameter
Min Max Min Max
Unit
tWC
Write cycle time
55
-
70
-
tWP
Write pulse width
45
-
55
-
tCW
Chip Enable to end of write
45
-
60
-
tBW
Data Byte Control to end of Write
45
-
60
-
tAS
Address setup time
0
-
0
-
tWR
Write Recovery time
0
-
0
-
tWHZ
WE# Low to Output in High-Z
-
20
-
20
tOW
WE# High to Output in Low-Z
5
-
5
-
tDS
Data Setup Time
25
-
30
-
tDH
Data Hold Time
0
-
0
-
ns
AC Test Condition
Output load : 60pF + one TTL gate
Input pulse level : 0.4V, 2.4V
Timing measurements : 0.5 x V
DD
tR, tF : 5ns
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