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Электронный компонент: 100354QI

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2000 Fairchild Semiconductor Corporation
DS010610
www.fairchildsemi.com
October 1989
Revised August 2000
1
00354 Low
Power 8-Bi
t Regis
t
er

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Dri
vers
100354
Low Power 8-Bit Register with Cut-Off Drivers
General Description
The 100354 contains eight D-type edge triggered, master/
slave flip-flops with individual inputs (D
n
), true outputs (Q
n
),
a clock input (CP), an output enable pin (OEN), and a com-
mon clock enable pin (CEN). Data enters the master when
CP is LOW and transfers to the slave when CP goes HIGH.
When the CEN input goes HIGH it overrides all other
inputs, disables the clock, and the Q outputs maintain the
last state.
A Q output follows its D input when the OEN pin is LOW. A
HIGH on OEN holds the outputs in a cut-off state. The cut-
off state is designed to be more negative than a normal
ECL LOW level. This allows the output emitter-followers to
turn off when the termination supply is
-
2.0V, presenting a
high impedance to the data bus. This high impedance
reduces termination power and prevents loss of low state
noise margin when several loads share the bus.
The 100354 outputs are designed to drive a doubly termi-
nated 50
transmission line (25
load impedance). All
inputs have 50 k
pull-down resistors.
Features
s
Cut-off drivers
s
Drives 25
load
s
Low power operation
s
2000V ESD protection
s
Voltage compensated operating range
=
-
4.2V to
-
5.7V
s
Available to industrial grade temperature range
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagrams
24-Pin DIP
28-Pin PLCC
Order Number
Package Number
Package Description
100354PC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
100354QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
100354QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
-
40
C to
+
85
C)
Pin Names
Description
D
0
D
7
Data Inputs
CEN
Clock Enable Input
CP
Clock Input (Active Rising Edge)
OEN
Output Enable Input
Q
0
Q
7
Data Outputs
www.fairchildsemi.com
2
100354
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
NC
=
No Change
X
=
Don't Care
Cutoff
=
Lower-than-LOW State
=
LOW-to-HIGH Transition
Logic Diagram
Inputs
Outputs
D
n
CEN
CP
OEN
Q
n
L
L
L
L
H
L
L
H
X
X
L
L
NC
X
X
H
L
NC
X
H
X
L
NC
X
X
X
H
Cutoff
3
www.fairchildsemi.com
1
00354
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version
DC Electrical Characteristics
(Note 3)
V
EE
=
-
4.2V to
-
5.7V, V
CC
=
V
CCA
=
GND, T
C
=
0
C to
+
85
C
Note 3: The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under "worst case" conditions.
Storage Temperature (T
STG
)
-
65
C to
+
150
C
Maximum Junction Temperature (T
J
)
+
150
C
V
EE
Pin Potential to Ground Pin
-
7.0V to
+
0.5V
Input Voltage (DC)
V
EE
to
+
0.5V
Output Current (DC Output HIGH)
-
100 mA
ESD (Note 2)
2000V
Case Temperature (T
C
)
Commercial
0
C to
+
85
C
Industrial
-
40
C to
+
85
C
Supply Voltage (V
EE
)
-
5.7V to
-
4.2V
Symbol
Parameter
Min
Typ
Max
Units
Conditions
V
OH
Output HIGH Voltage
-
1025
-
955
-
870
mV
V
IN
=
V
IH (Max)
Loading with
V
OL
Output LOW Voltage
-
1830
-
1705
-
1620
or V
IL (Min)
25
to
-
2.0V
V
OHC
Output HIGH Voltage
-
1035
mV
V
IN
=
V
IH (Min)
Loading with
V
OLC
Output LOW Voltage
-
1610
or V
IL (Max)
25
to
-
2.0V
V
OLZ
Cutoff LOW Voltage
-
1950
mV
V
IN
=
V
IH
(Min)
OEN
=
HIGH
or V
IL
(Max)
V
IH
Input HIGH Voltage
-
1165
-
870
mV
Guaranteed HIGH Signal for All Inputs
V
IL
Input LOW Voltage
-
1830
-
1475
mV
Guaranteed LOW Signal for All Inputs
I
IL
Input LOW Current
0.50
A
V
IN
=
V
IL (Min)
I
IH
Input HIGH Current
240
A
V
IN
=
V
IH (Max)
I
EE
Power Supply Current
Inputs Open
-
202
-
105
mA
V
EE
=
-
4.2V to
-
4.8V
-
209
-
105
V
EE
=
-
4.2V to
-
5.7V
www.fairchildsemi.com
4
100354
Commercial Version
(Continued)
DIP AC Electrical Characteristics
V
EE
=
-
4.2V to
-
5.7V, V
CC
=
V
CCA
=
GND
Note 4: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
PLCC AC Electrical Characteristics
V
EE
=
-
4.2V to
-
5.7V, V
CC
=
V
CCA
=
GND
Note 5: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
Note 6: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-
aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (t
OSHL
), or LOW-to-HIGH (t
OSLH
), or in opposite
directions both HL and LH (t
OST
). Parameters t
OST
and t
PS
guaranteed by design.
Symbol
Parameter
T
C
=
0
C
T
C
=
+
25
C
T
C
=
+
85
C
Units
Conditions
Min
Max
Min
Max
Min
Max
f
MAX
Toggle Frequency
250
250
250
MHz
Figures 1, 4
t
PLH
Propagation Delay
1.40
3.00
1.40
3.00
1.50
3.10
ns
Figures 1, 4
t
PHL
CP to Output
(Note 4)
t
PZH
Propagation Delay
1.60
4.20
1.60
4.20
1.60
4.20
ns
Figures 3, 7
t
PHZ
OEN to Output
1.00
2.70
1.00
2.70
1.00
2.70
(Note 4)
t
TLH
Transition Time
0.45
2.00
0.45
2.00
0.45
2.00
ns
Figures 1, 4
t
THL
20% to 80%, 80% to 20%
t
S
Setup Time
D
n
1.10
1.10
1.10
CEN (Disable Time)
0.40
0.40
0.40
ns
Figures 2, 5
CEN (Release Time)
1.10
1.10
1.10
t
H
Hold Time
0.10
0.10
0.10
ns
Figures 1, 6
D
n
t
PW
(H)
Pulse Width HIGH
2.00
2.00
2.00
ns
Figures 1, 4
CP
Symbol
Parameter
T
C
=
0
C
T
C
=
+
25
C
T
C
=
+
85
C
Units
Conditions
Min
Max
Min
Max
Min
Max
f
MAX
Toggle Frequency
250
250
250
MHz
Figures 1, 4
t
PLH
Propagation Delay
1.40
2.80
1.40
2.80
1.50
2.90
ns
Figures 1, 4
t
PHL
CP to Output
(Note 5)
t
PZH
Propagation Delay
1.60
4.00
1.60
4.00
1.60
4.00
ns
Figures 3, 7
t
PHZ
OEN to Output
1.00
2.50
1.00
2.50
1.00
2.50
(Note 5)
t
TLH
Transition Time
0.45
1.90
0.45
1.90
0.45
1.90
ns
Figures 1, 4
t
THL
20% to 80%, 80% to 20%
t
S
Setup Time
D
n
1.00
1.00
1.00
CEN (Disable Time)
0.30
0.30
0.30
ns
Figures 2, 5
CEN (Release Time)
1.00
1.00
1.00
t
H
Hold Time
0.00
0.00
0.00
ns
Figures 1, 6
D
n
t
PW
(H)
Pulse Width HIGH
2.00
2.00
2.00
ns
Figures 1, 4
CP
t
OSHL
Maximum Skew Common Edge
Output-to-Output Variation
280
280
280
ps
(Note 6)
Clock to Output Path
t
OSLH
Maximum Skew Common Edge
Output-to-Output Variation
340
340
340
ps
(Note 6)
Clock to Output Path
t
OST
Maximum Skew Opposite Edge
Output-to-Output Variation
340
340
340
ps
(Note 6)
Clock to Output Path
t
PS
Maximum Skew
Pin (Signal) Transition Variation
250
250
250
ps
(Note 6)
Clock to Output Path
5
www.fairchildsemi.com
1
00354
Industrial Version
PLCC DC Electrical Characteristics
(Note 7)
V
EE
=-
4.2V to
-
5.7V, V
CC
=
V
CCA
=
GND, T
C
=-
40
C to
+
85
C
Note 7: The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under "worst case" conditions.
PLCC AC Electrical Characteristics
V
EE
=
-
4.2V to
-
5.7V, V
CC
=
V
CCA
=
GND
Note 8: The propagation delay specified is for single output switching. Delays may vary up to 300 ps with multiple outputs switching.
Symbol
Parameter
T
C
=
-
40
C
T
C
=
0
to
+
85
C
Units
Conditions
Min
Max
Min
Max
V
OH
Output HIGH Voltage
-
1085
-
870
-
1025
-
870
mV
V
IN
=
V
IH
(Max)
Loading with
V
OL
Output LOW Voltage
-
1830
-
1575
-
1830
-
1620
or V
IL
(Min)
50
to
-
2.0V
V
OHC
Output HIGH Voltage
-
1095
-
1035
mV
V
IN
=
V
IH
(Min)
Loading with
V
OLC
Output LOW Voltage
-
1565
-
1610
or V
IL
(Max)
50
to
-
2.0V
V
OLZ
Cutoff LOW Voltage
-
1900
-
1950
mV
V
IN
=
V
IH
(Min)
OEN
=
HIGH
or V
IL
(Max)
V
IH
Input HIGH Voltage
-
1170
-
870
-
1165
-
870
mV
Guaranteed HIGH Signal
for All Inputs
V
IL
Input LOW Voltage
-
1830
-
1480
-
1830
-
1475
mV
Guaranteed LOW Signal
for All Inputs
I
IL
Input LOW Current
0.50
0.50
A
V
IN
=
V
IL
(Min)
I
IH
Input HIGH Current
240
240
A
V
IN
=
V
IH
(Max)
I
EE
Power Supply Current
Inputs Open
-
202
-
105
-
202
-
105
mA
V
EE
=
-
4.2V to
-
4.8V
-
209
-
105
-
209
-
105
V
EE
=
-
4.2V to
-
5.7V
Symbol
Parameter
T
C
=
-
40
C
T
C
=
+
25
C
T
C
=
+
85
C
Units
Conditions
Min
Max
Min
Max
Min
Max
f
MAX
Toggle Frequency
250
250
250
MHz
Figures 1, 4
t
PLH
Propagation Delay
1.40
2.80
1.40
2.80
1.50
2.90
ns
Figures 1, 4
t
PHL
CP to Output
(Note 8)
t
PZH
Propagation Delay
1.50
4.10
1.60
4.00
1.60
4.00
ns
Figures 3, 5
t
PHZ
OEN to Output
1.00
2.50
1.00
2.50
1.00
2.50
(Note 8)
t
TLH
Transition Time
0.45
1.90
0.45
1.90
0.45
1.90
ns
Figures 1, 4
t
THL
20% to 80%, 80% to 20%
t
S
Setup Time
D
n
1.00
1.00
1.00
CEN (Disable Time)
0.30
0.30
0.30
ns
Figures 2, 5
CEN (Release Time)
1.00
1.00
1.00
t
H
Hold Time
0.00
0.00
0.00
ns
Figures 1, 6
D
n
t
PW
(H)
Pulse Width High
2.00
2.00
2.00
ns
Figures 1, 4
CP