1999 Fairchild Semiconductor Corporation
DS009946
www.fairchildsemi.com
November 1988
Revised November 1999
7
4
AC
2
53
74ACT253 Dual 4-I
nput
Mult
i
p
lexer
wi
th 3-ST
A
T
E
Out
puts
74AC253 74ACT253
Dual 4-Input Multiplexer with 3-STATE Outputs
General Description
The AC/ACT253 is a dual 4-input multiplexer with 3-STATE
outputs. It can select two bits of data from four sources
using common select inputs. The outputs may be individu-
ally switched to a high impedance state with a HIGH on the
respective Output Enable (OE) inputs, allowing the outputs
to interface directly with bus oriented systems.
Features
s
I
CC
and I
OZ
reduced by 50%
s
Multifunction capability
s
Noninverting 3-STATE outputs
s
Outputs source/sink 24 mA
s
ACT253 has TTL-compatible inputs
Ordering Code:
Device also available Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Diagrams
IEEE/IEC
Connection Diagram
Pin Descriptions
FACT
is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package Number
Package Description
74AC253SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body
74AC253SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC253PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74ACT253SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Body
74ACT253SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ACT253PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pin Names
Description
I
0a
I
3a
Side A Data Inputs
I
0b
I
3b
Side B Data Inputs
S
0
, S
1
Common Select Inputs
OE
a
Side A Output Enable Input
OE
b
Side B Output Enable Input
Z
a
, Z
b
3-STATE Outputs
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2
74AC253
74ACT253
Functional Description
The AC/ACT253 contains two identical 4-input multiplexers
with 3-STATE outputs. They select two bits from four
sources selected by common Select inputs (S
0
, S
1
). The 4-
input multiplexers have individual Output Enable (OE
a
,
OE
b
) inputs which, when HIGH, force the outputs to a high
impedance (High Z) state. This device is the logic imple-
mentation of a 2-pole, 4-position switch, where the position
of the switch is determined by the logic levels supplied to
the two select inputs. The logic equations for the outputs
are shown:
Z
a
=
OE
a
(I
0a
S
1
S
0
+
I
1a
S
1
S
0
+
I
2a
S
1
S
0
+
I
3a
S
1
S
0
)
Z
b
=
OE
b
(I
0b
S
1
S
0
+
I
1b
S
1
S
0
+
I
2b
S
1
S
0
+
I
3b
S
1
S
0
)
If the outputs of 3-STATE devices are tied together, all but
one device must be in the high impedance state to avoid
high currents that would exceed the maximum ratings.
Designers should ensure that Output Enable signals to 3-
STATE devices whose outputs are tied together are
designed so that there is no overlap.
Truth Table
Address Inputs S
0
and S
1
are common to both sections.
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Select
Data Inputs
Output
Outputs
Inputs
Enable
S
0
S
1
I
0
I
1
I
2
I
3
OE
Z
X
X
X
X
X
X
H
Z
L
L
L
X
X
X
L
L
L
L
H
X
X
X
L
H
H
L
X
L
X
X
L
L
H
L
X
H
X
X
L
H
L
H
X
X
L
X
L
L
L
H
X
X
H
X
L
H
H
H
X
X
X
L
L
L
H
H
X
X
X
H
L
H
3
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74
A
C
25
3
74ACT253
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT
circuits outside databook specifications.
DC Electrical Characteristics for AC
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
Supply Voltage (V
CC
)
-
0.5V to
+
7.0V
DC Input Diode Current (I
IK
)
V
I
=
-
0.5V
-
20 mA
V
I
=
V
CC
+
0.5V
+
20 mA
DC Input Voltage (V
I
)
-
0.5V to V
CC
+
0.5V
DC Output Diode Current (I
OK
)
V
O
=
-
0.5V
-
20 mA
V
O
=
V
CC
+
0.5V
+
20 mA
DC Output Voltage (V
O
)
-
0.5V to V
CC
+
0.5V
DC Output Source
or Sink Current (I
O
)
50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
50 mA
Storage Temperature (T
STG
)
-
65
C to
+
150
C
Junction Temperature (T
J
)
PDIP
140
C
Supply Voltage (V
CC
)
AC
2.0V to 6.0V
ACT
4.5V to 5.5V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
-
40
C to
+
85
C
Minimum Input Edge Rate (
V/
t)
AC Devices
V
IN
from 30% to 70% of V
CC
V
CC
@ 3.3V, 4.5V, 5.5V
125 mV/ns
Minimum Input Edge Rate (
V/
t)
ACT Devices
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
125 mV/ns
Symbol
Parameter
V
CC
(V)
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
3.0
1.5
2.1
2.1
V
OUT
=
0.1V
Input Voltage
4.5
2.25
3.15
3.15
V
or V
CC
-
0.1V
5.5
2.75
3.85
3.85
V
IL
Maximum LOW Level
3.0
1.5
0.9
0.9
V
OUT
=
0.1V
Input Voltage
4.5
2.25
1.35
1.35
V
or V
CC
-
0.1V
5.5
2.75
1.65
1.65
V
OH
Minimum HIGH Level
3.0
2.99
2.9
2.9
Output Voltage
4.5
4.49
4.4
4.4
V
I
OUT
=
-
50
A
5.5
5.49
5.4
5.4
V
IN
=
V
IL
or V
IH
3.0
2.56
2.46
I
OH
=
-
12 mA
4.5
3.86
3.76
V
I
OH
=
-
24 mA
5.5
4.86
4.76
I
OH
=
-
24 mA (Note 2)
V
OL
Maximum LOW Level
3.0
0.002
0.1
0.1
Output Voltage
4.5
0.001
0.1
0.1
V
I
OUT
=
50
A
5.5
0.001
0.1
0.1
V
IN
=
V
IL
or V
IH
3.0
0.36
0.44
I
OL
=
12 mA
4.5
0.36
0.44
V
I
OL
=
24 mA
5.5
0.36
0.44
I
OL
=
24 mA (Note 2)
I
IN
(Note 4)
Maximum Input Leakage Current
5.5
0.1
1.0
A
V
I
=
V
CC
, GND
I
OZ
Maximum 3-STATE
V
I
(OE)
=
V
IL
, V
IH
Current
5.5
0.25
2.5
A
V
I
=
V
CC
, GND
V
O
=
V
CC
, GND
I
OLD
Minimum Dynamic
5.5
75
mA
V
OLD
=
1.65V Max
I
OHD
Output Current (Note 3)
5.5
-
75
mA
V
OHD
=
3.85V Min
I
CC
(Note 4)
Maximum Quiescent Supply Current
5.5
4.0
40.0
A
V
IN
=
V
CC
or GND
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4
74AC253
74ACT253
DC Electrical Characteristics for ACT
Note 5: All outputs loaded; thresholds on input associated with output under test.
Note 6: Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
Note 7: Voltage Range 3.3 is 3.3V
0.3V
Voltage Range 5.0 is 5.0V
0.5V
Symbol
Parameter
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
(V)
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
4.5
1.5
2.0
2.0
V
V
OUT
=
0.1V
Input Voltage
5.5
1.5
2.0
2.0
or V
CC
-
0.1V
V
IL
Maximum LOW Level
4.5
1.5
0.8
0.8
V
V
OUT
=
0.1V
Input Voltage
5.5
1.5
0.8
0.8
or V
CC
-
0.1V
V
OH
Minimum HIGH Level
4.5
4.49
4.4
4.4
V
I
OUT
=
-
50
A
Output Voltage
5.5
5.49
5.4
5.4
V
IN
=
V
IL
or V
IH
4.5
3.86
3.76
V
I
OH
=
-
24 mA
5.5
4.86
4.76
I
OH
=
-
24 mA (Note 5)
V
OL
Maximum LOW Level
4.5
0.001
0.1
0.1
V
I
OUT
=
50
A
Output Voltage
5.5
0.001
0.1
0.1
V
IN
=
V
IL
or V
IH
4.5
0.36
0.44
V
I
OL
=
24 mA
5.5
0.36
0.44
I
OL
=
24 mA (Note 5)
I
IN
Maximum Input
5.5
0.1
1.0
A
V
I
=
V
CC
, GND
Leakage Current
I
OZ
Maximum 3-STATE
5.5
0.25
2.5
A
V
I
=
V
IL
, V
IH
Current
V
O
=
V
CC
, GND
I
CCT
Maximum
5.5
0.6
1.5
mA
V
I
=
V
CC
-
2.1V
I
CC
/Input
I
OLD
Minimum Dynamic
5.5
75
mA
V
OLD
=
1.65V Max
I
OHD
Output Current (Note 6)
5.5
-
75
mA
V
OHD
=
3.85V Min
I
CC
Maximum Quiescent
5.5
4.0
40.0
A
V
IN
=
V
CC
Supply Current
or GND
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Symbol
Parameter
(V)
C
L
=
50 pF
C
L
=
50 pF
Units
(Note 7)
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
3.3
2.0
8.5
15.5
2.0
17.5
ns
S
n
to Z
n
5.0
2.0
6.5
11.0
1.5
12.5
t
PHL
Propagation Delay
3.3
2.5
9.5
16.0
2.0
18.0
ns
S
n
to Z
n
5.0
2.0
7.0
11.5
1.5
13.0
t
PLH
Propagation Delay
3.3
1.5
7.0
14.5
1.5
17.0
ns
I
n
to Z
n
5.0
1.5
5.5
10.0
1.5
11.5
t
PHL
Propagation Delay
3.3
2.0
7.5
13.0
1.5
15.0
ns
I
n
to Z
n
5.0
1.5
5.5
9.5
1.5
11.0
t
PZH
Output Enable Time
3.3
1.5
4.5
8.0
1.0
8.5
ns
5.0
1.5
3.5
6.0
1.0
6.5
t
PZL
Output Enable Time
3.3
1.5
5.0
8.0
1.0
9.0
ns
5.0
1.5
3.5
6.0
1.0
7.0
t
PHZ
Output Disable Time
3.3
2.0
5.5
9.5
1.5
10.0
ns
5.0
2.0
5.0
8.0
1.5
8.5
t
PLZ
Output Disable Time
3.3
1.5
5.0
8.0
1.0
9.0
ns
5.0
1.5
4.0
7.0
1.0
7.5
5
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74
A
C
25
3
74ACT253
AC Electrical Characteristics for ACT
Note 8: Voltage Range 5.0 is 5.0V
0.5V
Capacitance
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Symbol
Parameter
(V)
C
L
=
50 pF
C
L
=
50 pF
Units
(Note 8)
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
5.0
2.0
7.0
11.5
2.0
13.0
ns
S
n
to Z
n
t
PHL
Propagation Delay
5.0
3.0
7.5
13.0
2.5
14.5
ns
S
n
to Z
n
t
PLH
Propagation Delay
5.0
2.5
5.5
10.0
2.0
11.0
ns
I
n
to Z
n
t
PHL
Propagation Delay
5.0
3.5
6.5
11.0
3.0
12.5
ns
I
n
to Z
n
t
PZH
Output Enable Time
5.0
2.0
4.5
7.5
1.5
8.5
ns
t
PZL
Output Enable Time
5.0
2.0
5.0
8.0
1.5
9.0
ns
t
PHZ
Output Disable Time
5.0
3.0
6.0
9.5
2.5
10.0
ns
t
PLZ
Output Disable Time
5.0
2.5
4.5
7.5
2.0
8.5
ns
Symbol
Parameter
Typ
Units
Conditions
C
IN
Input Capacitance
4.5
pF
V
CC
=
OPEN
C
PD
Power Dissipation Capacitance
50.0
pF
V
CC
=
5.0V
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