2001 Fairchild Semiconductor Corporation
DS500471
www.fairchildsemi.com
September 2000
Revised August 2001
7
4
LCX162244 Low
V
o
lt
age 16-Bi
t Buff
er/
L
in
e
Dri
ver
wit
h
26
Seri
es Resist
ors i
n
Out
puts
74LCX162244
Low Voltage 16-Bit Buffer/Line Driver
with 26
Series Resistors in Outputs
General Description
The LCX162244 contains sixteen non-inverting buffers with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus oriented transmit-
ter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The LCX162244 is designed for low voltage (2.5V or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
In addition, the outputs include equivalent 26
(nominal)
series resistors to reduce overshoot and undershoot and
are designed to sink/source up to 12 mA at V
CC
=
3.0V.
The LCX162244 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V3.6V V
CC
specifications provided
s
Outputs include equivalent series resistance of 26
to
make external termination resistors unnecessary and
reduce overshoot and undershoot
s
5.3 ns t
PD
max (V
CC
=
3.0V), 20
A I
CC
max
s
Power down high impedance inputs and outputs
s
12 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Note 1: BGA package available in Tape and Reel only.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
Order Number
Package Number
Package Description
74LCX162244GX
(Note 1)
BGA54A
(Preliminary)
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
74LCX162244MEA
(Note 2)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LCX162244MTD
(Note 2)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
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2
74LCX162244
Connection Diagrams
Pin Assignment for SSOP and TSSOP
Pin Assignment for FBGA
(Top Thru View)
Pin Descriptions
FBGA Pin Assignments
Truth Tables
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Pin Names
Description
OE
n
Output Enable Input (Active LOW)
I
0
I
15
Inputs
O
0
O
15
Outputs
NC
No Connect
1
2
3
4
5
6
A
O
0
NC
OE
1
OE
2
NC
I
0
B
O
2
O
1
NC
NC
I
1
I
2
C
O
4
O
3
V
CC
V
CC
I
3
I
4
D
O
6
O
5
GND
GND
I
5
I
6
E
O
8
O
7
GND
GND
I
7
I
8
F
O
10
O
9
GND
GND
I
9
I
10
G
O
12
O
11
V
CC
V
CC
I
11
I
12
H
O
14
O
13
NC
NC
I
13
I
14
J
O
15
NC
OE
4
OE
3
NC
I
15
Inputs
Outputs
OE
1
I
0
I
3
O
0
O
3
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
2
I
4
I
7
O
4
O
7
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
3
I
8
I
11
O
8
O
11
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
4
I
12
I
15
O
12
O
15
L
L
L
L
H
H
H
X
Z
3
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7
4
LCX162244
Functional Description
The LCX162244 contains sixteen non-inverting buffers with
3-STATE standard outputs. The device is designed with
26
series resistors in the outputs. This design reduces
line noise in applications such as memory address drivers,
clock drivers and bus transceiver/transmitters. The device
is nibble (4 bits) controlled with each nibble functioning
identically, but independent of the other. The control pins
can be shorted together to obtain full 16-bit operation. The
3-STATE outputs are controlled by an Output Enable (OE
n
)
input for each nibble. When OE
n
is LOW, the outputs are in
2-state mode. When OE
n
is HIGH, the outputs are in the
high impedance mode, but this does not interfere with
entering new data into the inputs.
Logic Diagram
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4
74LCX162244
Absolute Maximum Ratings
(Note 3)
Recommended Operating Conditions
(Note 5)
Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recom-
mended Operating Conditions" table will define the conditions for actual device operation.
Note 4: I
O
Absolute Maximum Rating must be observed.
Note 5: Unused control inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
Value
Conditions
Units
V
CC
Supply Voltage
-
0.5 to
+
7.0
V
V
I
DC Input Voltage
-
0.5 to
+
7.0
V
V
O
DC Output Voltage
-
0.5 to
+
7.0
Output in 3-STATE
V
-
0.5 to V
CC
+
0.5
Output in HIGH or LOW State (Note 4)
I
IK
DC Input Diode Current
-
50
V
I
<
GND
mA
I
OK
DC Output Diode Current
-
50
V
O
<
GND
mA
+
50
V
O
>
V
CC
I
O
DC Output Source/Sink Current
50
mA
I
CC
DC Supply Current per Supply Pin
100
mA
I
GND
DC Ground Current per Ground Pin
100
mA
T
STG
Storage Temperature
-
65 to
+
150
C
Symbol
Parameter
Min
Max
Units
V
CC
Supply Voltage
Operating
2.0
3.6
V
Data Retention
1.5
3.6
V
I
Input Voltage
0
5.5
V
V
O
Output Voltage
HIGH or LOW State
0
V
CC
V
3-STATE
0
5.5
I
OH
/I
OL
Output Current
V
CC
=
3.0V
-
3.6V
12
mA
V
CC
=
2.7V
-
3.0V
8
V
CC
=
2.3V
-
2.7V
4
T
A
Free-Air Operating Temperature
-
40
85
C
t/
V
Input Edge Rate, V
IN
=
0.8V2.0V, V
CC
=
3.0V
0
10
ns/V
Symbol
Parameter
Conditions
V
CC
T
A
=
-
40
C to
+
85
C
Units
(V)
Min
Max
V
IH
HIGH Level Input Voltage
2.3
-
2.7
1.7
V
2.7
-
3.6
2.0
V
IL
LOW Level Input Voltage
2.3
-
2.7
0.7
V
2.7
-
3.6
0.8
V
OH
HIGH Level Output Voltage
I
OH
=
-
100
A
2.3
-
3.6
V
CC
-
0.2
V
I
OH
=
-
4 mA
2.3
1.8
I
OH
=
-
4 mA
2.7
2.2
I
OH
=
-
6 mA
3.0
2.4
I
OH
=
-
8 mA
2.7
2.0
I
OH
=
-
12 mA
3.0
2.0
V
OL
LOW Level Output Voltage
I
OL
=
100
A
2.3
-
3.6
0.2
V
I
OL
=
4 mA
2.3
0.6
I
OL
=
4 mA
2.7
0.4
I
OL
=
6 mA
3.0
0.55
I
OL
=
8 mA
2.7
0.6
I
OL
=
12 mA
3.0
0.8
I
I
Input Leakage Current
0
V
I
5.5
2.3
-
3.6
5.0
A
I
OZ
3-STATE Output Leakage
0
V
O
5.5V
2.3
-
3.6
5.0
A
V
I
=
V
IH
or V
IL
5
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7
4
LCX162244
DC Electrical Characteristics
(Continued)
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
AC Electrical Characteristics
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by design.
Dynamic Switching Characteristics
Capacitance
Symbol
Parameter
Conditions
V
CC
T
A
=
-
40
C to
+
85
C
Units
(V)
Min
Max
I
OFF
Power-Off Leakage Current
V
IN
or V
O
=
5.5V
0
10
A
I
CC
Quiescent Supply Current
V
I
=
V
CC
or GND
2.3
-
3.6
20
A
I
CC
Increase in I
CC
per Input
V
IH
=
V
CC
-
0.6V
2.3
-
3.6
500
A
Symbol
Parameter
T
A
=
-
40
C to
+
85
C, R
L
=
500
Units
V
CC
=
3.3V
0.3V
V
CC
=
2.7V
V
CC
=
2.5V
0.2V
C
L
=
50 pF
C
L
=
50 pF
C
L
=
30 pF
Min
Max
Min
Max
Min Max
t
PHL
Propagation Delay
1.0
5.3
1.0
6.0
1.0
6.4
ns
t
PLH
Data to Output
1.0
5.3
1.0
6.0
1.0
6.4
t
PZL
Output Enable Time
1.0
6.3
1.0
7.1
1.0
8.2
ns
t
PZH
1.0
6.3
1.0
7.1
1.0
8.2
t
PLZ
Output Disable Time
1.0
5.4
1.0
5.7
1.0
6.5
ns
t
PHZ
1.0
5.4
1.0
5.7
1.0
6.5
t
OSHL
Output to Output Skew (Note 8)
1.0
ns
t
OSLH
1.0
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
Units
(V)
Typical
V
OLP
Quiet Output Dynamic Peak V
OL
C
L
=
50 pF, V
IH
=
3.3V, V
IL
=
0V
3.3
0.35
V
C
L
=
30 pF, V
IH
=
2.5V, V
IL
=
0V
2.5
0.25
V
OLV
Quiet Output Dynamic Valley V
OL
C
L
=
50 pF, V
IH
=
3.3V, V
IL
=
0V
3.3
-
0.35
V
C
L
=
30 pF, V
IH
=
2.5V, V
IL
=
0V
2.5
-
0.25
Symbol
Parameter
Conditions
Typical
Units
C
IN
Input Capacitance
V
CC
=
Open, V
I
=
0V or V
CC
7
pF
C
OUT
Output Capacitance
V
CC
=
3.3V, V
I
=
0V or V
CC
8
pF
C
PD
Power Dissipation Capacitance
V
CC
=
3.3V, V
I
=
0V or V
CC
, f
=
10 MHz
20
pF
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