2002 Fairchild Semiconductor Corporation
DS500426
www.fairchildsemi.com
April 2001
Revised June 2002
7
4
LCX32244
Low
V
o
lt
age
32-Bi
t
Buff
er/
L
ine
Dri
ver
wit
h
5
V
T
o
l
e
rant
I
nputs
and
Output
s
74LCX32244
Low Voltage 32-Bit Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
General Description
The LCX32244 contains thirty-two non-inverting buffers
with 3-STATE outputs designed to be employed as a mem-
ory and address driver, clock driver, or bus oriented trans-
mitter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 32-bit operation.
The LCX32244 is designed for low voltage (2.5V or 3.3V)
V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX32244 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V3.6V V
CC
specifications provided
s
4.5 ns t
PD
max (V
CC
=
3.0V), 20
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
24 mA output drive (V
CC
=
3.0V)
s
Uses patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
s
Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Note 1: To ensure the high-impedance state during power up or down OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Note 2: Ordering code "G" indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
Order Number
Package Number
Package Description
74LCX32244G
(Note 2)(Note 3)
BGA96A
96-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
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2
74LCX32244
Connection Diagram
(Top Thru View)
Functional Description
The LCX32244 contains thirty-two non-inverting buffers
with 3-STATE standard outputs. The device is nibble
(4-bits) controlled with each nibble functioning identically,
but independent of the other. The control pins can be
shorted together to obtain full 32-bit operation. The
3-STATE outputs are controlled by an Output Enable (OE
n
)
input for each nibble. When OE
n
is LOW, the outputs are in
2-state mode. When OE
n
is HIGH, the outputs are in the
high impedance mode, but this does not interfere with
entering new data into the inputs.
Pin Descriptions
FBGA Pin Assignments
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial (HIGH or LOW, inputs may not float)
Z
=
High Impedance
Logic Diagrams
Pin Names
Description
OE
n
Output Enable Input (Active LOW)
I
0
I
31
Inputs
O
0
O
31
Outputs
1
2
3
4
5
6
A
O
1
O
0
OE
1
OE
2
I
0
I
1
B
O
3
O
2
GND
GND
I
2
I
3
C
O
5
O
4
V
CC
V
CC
I
4
I
5
D
O
7
O
6
GND
GND
I
6
I
7
E
O
9
O
8
GND
GND
I
8
I
9
F
0
11
O
10
V
CC
V
CC
I
10
I
11
G
O
13
O
12
GND
GND
I
12
I
13
H
O
14
O
15
OE
4
OE
3
I
15
I
14
J
O
17
O
16
OE
5
OE
6
I
16
I
17
K
O
19
0
18
GND
GND
I
18
I
19
L
O
21
O
20
V
CC
V
CC
I
20
I
21
M
O
23
O
22
GND
GND
I
22
I
23
N
O
25
O
24
GND
GND
I
24
I
25
P
O
27
O
26
V
CC
V
CC
I
26
I
27
R
O
29
O
28
GND
GND
I
28
I
29
T
O
30
O
31
OE
8
OE
7
I
31
I
30
Inputs
Outputs
OE
n
I
n
O
n
L
L
L
L
H
H
H
X
Z
3
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7
4
LCX32244
Absolute Maximum Ratings
(Note 4)
Recommended Operating Conditions
(Note 6)
Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated
at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The "Recom-
mended Operating Conditions" table will define the conditions for actual device operation.
Note 5: I
O
Absolute Maximum Rating must be observed.
Note 6: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
Value
Conditions
Units
V
CC
Supply Voltage
-
0.5 to
+
7.0
V
V
I
DC Input Voltage
-
0.5 to
+
7.0
V
V
O
DC Output Voltage
-
0.5 to
+
7.0
Output in 3-STATE
V
-
0.5 to V
CC
+
0.5
Output in HIGH or LOW State (Note 5)
I
IK
DC Input Diode Current
-
50
V
I
<
GND
mA
I
OK
DC Output Diode Current
-
50
V
O
<
GND
mA
+
50
V
O
>
V
CC
I
O
DC Output Source/Sink Current
50
mA
I
CC
DC Supply Current per Supply Pin
100
mA
I
GND
DC Ground Current per Ground Pin
100
mA
T
STG
Storage Temperature
-
65 to
+
150
C
Symbol
Parameter
Min
Max
Units
V
CC
Supply Voltage
Operating
2.0
3.6
V
Data Retention
1.5
3.6
V
I
Input Voltage
0
5.5
V
V
O
Output Voltage
HIGH or LOW State
0
V
CC
V
3-STATE
0
5.5
I
OH
/I
OL
Output Current
V
CC
=
3.0V
-
3.6V
24
mA
V
CC
=
2.7V
-
3.0V
12
V
CC
=
2.3V
-
2.7V
8
T
A
Free-Air Operating Temperature
-
40
85
C
t/
V
Input Edge Rate, V
IN
=
0.8V2.0V, V
CC
=
3.0V
0
10
ns/V
Symbol
Parameter
Conditions
V
CC
T
A
=
-
40
C to
+
85
C
Units
(V)
Min
Max
V
IH
HIGH Level Input Voltage
2.3
-
2.7
1.7
V
2.7
-
3.6
2.0
V
IL
LOW Level Input Voltage
2.3
-
2.7
0.7
V
2.7
-
3.6
0.8
V
OH
HIGH Level Output Voltage
I
OH
=
-
100
A
2.3
-
3.6
V
CC
-
0.2
V
I
OH
=
-
8 mA
2.3
1.8
I
OH
=
-
12 mA
2.7
2.2
I
OH
=
-
18 mA
3.0
2.4
I
OH
=
-
24 mA
3.0
2.2
V
OL
LOW Level Output Voltage
I
OL
=
100
A
2.3
-
3.6
0.2
V
I
OL
=
8 mA
2.3
0.6
I
OL
=
12 mA
2.7
0.4
I
OL
=
16 mA
3.0
0.4
I
OL
=
24 mA
3.0
0.55
I
I
Input Leakage Current
0
V
I
5.5V
2.3
-
3.6
5.0
A
I
OZ
3-STATE Output Leakage
0
V
O
5.5V
2.3
-
3.6
5.0
A
V
I
=
V
IH
or V
IL
I
OFF
Power-Off Leakage Current
V
I
or V
O
=
5.5V
0
10
A
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4
74LCX32244
DC Electrical Characteristics
(Continued)
Note 7: Outputs disabled or 3-STATE only.
AC Electrical Characteristics
Dynamic Switching Characteristics
Capacitance
Symbol
Parameter
Conditions
V
CC
T
A
=
-
40
C to
+
85
C
Units
(V)
Min
Max
I
CC
Quiescent Supply Current
V
I
=
V
CC
or GND
2.3
-
3.6
20
A
3.6V
V
I
, V
O
5.5V (Note 7)
2.3
-
3.6
20
I
CC
Increase in I
CC
per Input
V
IH
=
V
CC
-
0.6V
2.3
-
3.6
500
A
Symbol
Parameter
T
A
=
-
40
C to
+
85
C, R
L
=
500
Units
V
CC
=
3.3V
0.3V
V
CC
=
2.7V
V
CC
=
2.5V
0.2V
C
L
=
50 pF
C
L
=
50 pF
C
L
=
30 pF
Min
Max
Min
Max
Min Max
t
PHL
Propagation Delay
1.0
4.5
1.0
5.2
1.0
5.4
ns
t
PLH
Data to Output
1.0
4.5
1.0
5.2
1.0
5.4
t
PZL
Output Enable Time
1.0
5.5
1.0
6.3
1.0
7.2
ns
t
PZH
1.0
5.5
1.0
6.3
1.0
7.2
t
PLZ
Output Disable Time
1.0
5.4
1.0
5.7
1.0
6.5
ns
t
PHZ
1.0
5.4
1.0
5.7
1.0
6.5
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
Units
(V)
Typical
V
OLP
Quiet Output Dynamic Peak V
OL
C
L
=
50 pF, V
IH
=
3.3V, V
IL
=
0V
3.3
0.8
V
C
L
=
30 pF, V
IH
=
2.5V, V
IL
=
0V
2.5
0.6
V
OLV
Quiet Output Dynamic Valley V
OL
C
L
=
50 pF, V
IH
=
3.3V, V
IL
=
0V
3.3
-
0.8
V
C
L
=
30 pF, V
IH
=
2.5V, V
IL
=
0V
2.5
-
0.6
Symbol
Parameter
Conditions
Typical
Units
C
IN
Input Capacitance
V
CC
=
Open, V
I
=
0V or V
CC
7
pF
C
OUT
Output Capacitance
V
CC
=
3.3V, V
I
=
0V or V
CC
8
pF
C
PD
Power Dissipation Capacitance
V
CC
=
3.3V, V
I
=
0V or V
CC
, f
=
10 MHz
20
pF
5
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7
4
LCX32244
AC LOADING and WAVEFORMS
Generic for LCX Family
FIGURE 1. AC Test Circuit (C
L
includes probe and jig capacitance)
Waveform for Inverting and Non-Inverting Functions
Propagation Delay. Pulse Width and t
rec
Waveforms
3-STATE Output Low Enable and
Disable Times for Logic
3-STATE Output High Enable and
Disable Times for Logic
Setup Time, Hold Time and Recovery Time for Logic
t
rise
and t
fall
FIGURE 2. Waveforms
(Input Characteristics; f =1MHz, t
r
= t
f
= 3ns)
Test
Switch
t
PLH
, t
PHL
Open
t
PZL
, t
PLZ
6V at V
CC
=
3.3
0.3V, and 2.7V
V
CC
x 2 at V
CC
=
2.5
0.2V
t
PZH
, t
PHZ
GND
Symbol
V
CC
3.3V
0.3V
2.7V
2.5V
0.2V
V
mi
1.5V
1.5V
V
CC
/2
V
mo
1.5V
1.5V
V
CC
/2
V
x
V
OL
+
0.3V
V
OL
+
0.3V
V
OL
+
0.15V
V
y
V
OH
-
0.3V
V
OH
-
0.3V
V
OH
-
0.15V
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