74LVQ157
Low Voltage Quad 2-Input Multiplexer
General Description
The LVQ157 is a high-speed quad 2-input multiplexer. Four
bits of data from two sources can be selected using the com-
mon Select and Enable inputs. The four outputs present the
selected data in the true (noninverted) form. The LVQ157
can also be used as a function generator.
Features
n
Ideal for low power/low noise 3.3V applications
n
Guaranteed simultaneous switching noise level and
dynamic threshold performance
n
Guaranteed pin-to-pin skew AC performance
n
Guaranteed incident wave switching into 75
.
Ordering Code:
Order Number
Package Number
Package Description
74LVQ157SC
M16A
16-Lead (0.150" Wide) Small Outline Integrated Circuit, SOIC JEDEC
74LVQ157SJ
M16D
16-Lead Molded Small Outline Package, SOIC EIAJ
Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Symbols
Connection Diagram
Pin Descriptions
Pin Names
Description
I
0a
I
0d
Source 0 Data Inputs
I
1a
I
1d
Source 1 Data Inputs
E
Enable Input
S
Select Input
Z
a
Z
d
Outputs
DS011352-1
IEEE/IEC
DS011352-3
Pin Assignment
for SOIC JEDEC and EIAJ
DS011352-2
May 1998
74L
VQ157
Low
V
oltage
Quad
2-Input
Multiplexer
1998 Fairchild Semiconductor Corporation
DS011352
www.fairchildsemi.com
Truth Table
Inputs
Outputs
E
S
I
0
I
1
Z
H
X
X
X
L
L
H
X
L
L
L
H
X
H
H
L
L
L
X
L
L
L
H
X
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Functional Description
The LVQ157 is a quad 2-input multiplexer. It selects four bits
of data from two sources under the control of a common Se-
lect input (S). The Enable input (E) is active-LOW. When E is
HIGH, all of the outputs (Z) are forced LOW regardless of all
other inputs. The LVQ157 is the logic implementation of a
4-pole, 2-position switch where the position of the switch is
determined by the logic levels supplied to the Select input.
The logic equations for the outputs are shown below:
Z
a
= E (I
1a
S + I
0a
S )
Z
b
= E (I
1b
S + I
0b
S )
Z
c
= E (I
1c
S + I
0c
S )
Z
d
= E (I
1d
S + I
0d
S )
A common use of the LVQ157 is the moving of data from two
groups of registers to four common output busses. The par-
ticular register from which the data comes is determined by
the state of the Select input. A less obvious use is as a func-
tion generator. The LVQ157 can generate any four of the six-
teen different functions of two variables with one variable
common. This is useful for implementing gating functions.
Logic Diagram
DS011352-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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2
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
-0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
= -0.5V
-20 mA
V
I
= V
CC
+ 0.5V
+20 mA
DC Input Voltage (V
I
)
-0.5V to V
CC
+ 0.5V
DC Output Diode Current (I
OK
)
V
O
= -0.5V
-20 mA
V
O
= V
CC
+ 0.5V
+20 mA
DC Output Voltage (V
O
)
-0.5V to V
CC
+ 0.5V
DC Output Source
or Sink Current (I
O
)
50 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
)
200 mA
Storage Temperature (T
STG
)
-65C to +150C
DC Latch-Up Source or
Sink Current
100 mA
Recommended Operating
Conditions
(Note 2)
Supply Voltage (V
CC
)
2.0V to 3.6V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
-40C to +85C
Minimum Input Edge Rate (
V/
t)
V
IN
from 0.8V to 2.0V
V
CC
@
3.0V
125 mV/ns
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be op-
erated at these limits. The parametric values defined in the Electrical Charac-
teristics tables are not guaranteed at the absolute maximum ratings. The
"Recommended Operating Conditions" table will define the conditions for ac-
tual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
V
CC
(V)
T
A
= +25C
T
A
= -40C to +85C
Units
Conditions
Typ
Guaranteed Limits
V
IH
Minimum High Level
3.0
1.5
2.0
2.0
V
V
OUT
= 0.1V
Input Voltage
or V
CC
- 0.1V
V
IL
Maximum Low Level
3.0
1.5
0.8
0.8
V
V
OUT
= 0.1V
Input Voltage
or V
CC
- 0.1V
V
OH
Minimum High Level
Output Voltage
3.0
2.99
2.9
2.9
V
I
OUT
= -50 A
3.0
2.58
2.48
V
V
IN
= V
IL
or V
IH
(Note 3)
I
OH
= -12 mA
V
OL
Maximum Low Level
Output Voltage
3.0
0.002
0.1
0.1
V
I
OUT
= 50 A
3.0
0.36
0.44
V
V
IN
= V
IL
or V
IH
(Note 3)
I
OL
= 12 mA
I
IN
Maximum Input
3.6
0.1
1.0
A
V
I
= V
CC
, GND
Leakage Current
I
OLD
Minimum Dynamic
3.6
36
mA
V
OLD
= 0.8V Max (Note 5)
I
OHD
Output Current (Note 4)
3.6
-25
mA
V
OHD
= 2.0V Min (Note 5)
I
CC
Maximum Quiescent
3.6
4.0
40.0
A
V
IN
= V
CC
Supply Current
or GND
V
OLP
Quiet Output
3.3
0.7
0.8
V
(Notes 6, 7)
Maximum Dynamic V
OL
V
OLV
Quiet Output
3.3
-0.4
-0.8
V
(Notes 6, 7)
Minimum Dynamic V
OL
V
IHD
Maximum High Level
3.3
1.7
2.0
V
(Notes 6, 8)
Dynamic Input Voltage
V
ILD
Maximum Low Level
3.3
1.6
0.8
V
(Notes 6, 8)
Dynamic Input Voltage
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Incident wave switching on transmission lines with impedances as low as 75
for commercial temperature range is guaranteed for.
Note 6: Worst case package.
Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.
Note 8: Max number of Data Inputs (n) switching. (n - 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f = 1 MHz.
3
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AC Electrical Characteristics
Symbol
Parameter
V
CC
(V)
T
A
= +25C
C
L
= 50 pF
T
A
= -40C to +85C
C
L
= 50 pF
Units
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
2.7
1.5
84
16.2
1.5
19.0
ns
S to Z
n
3.3
0.3
1.5
7.0
11.5
1.5
13.0
t
PHL
Propagation Delay
2.7
1.5
7.8
15.5
1.5
17.0
ns
S to Z
n
3.3
0.3
1.5
6.5
11.0
1.5
12.0
t
PLH
Propagation Delay
2.7
1.5
8.4
16.2
1.5
19.0
ns
E to Z
n
3.3
0.3
1.5
7.0
11.5
1.5
13.0
t
PHL
Propagation Delay
2.7
1.5
7.8
15.5
1.5
17.0
ns
E to Z
n
3.3
0.3
1.5
6.5
11.0
1.5
12.0
t
PLH
Propagation Delay
2.7
1.5
6.0
12.0
1.0
13.0
ns
I
n
to Z
n
3.3
0.3
1.5
5.0
8.5
1.0
9.0
t
PHL
Propagation Delay
2.7
1.5
6.0
11.3
1.0
13.0
ns
I
n
to Z
n
3.3
0.3
1.5
5.0
8.0
1.0
9.0
t
OSHL,
Output to Output Skew (Note 9)
2.7
1.0
1.5
1.5
ns
t
OSLH
Data to Output
3.3
0.3
1.0
1.5
1.5
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The speci-
fication applies to any outputs switching in the same direction, either HIGH to LOW (t
OSHL
) or LOW to HIGH (t
OSLH
). Parameter guaranteed by design.
Capacitance
Symbol
Parameter
Typ
Units
Conditions
C
IN
Input Capacitance
4.5
pF
V
C
= Open
C
PD
(Note 10)
Power Dissipation
34.0
pF
V
CC
= 3.3V
Capacitance
Note 10: C
PD
is measured at 10 MHz.
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4
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead (0.150" Wide) Small Outline Integrated Circuit, SOIC JEDEC
Package Number M16A
16-Lead Molded Small Outline Package, SOIC EIAJ
Package Number M16D
5
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to the user.
2. A critical component in any component of a life support
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sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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74L
VQ157
Low
V
oltage
Quad
2-Input
Multiplexer
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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