2001 Fairchild Semiconductor Corporation
DS011355
www.fairchildsemi.com
February 1992
Revised June 2001
7
4
L
V
Q241 Low
V
o
l
t
age Octa
l Buff
er/
L
ine Dri
ver wit
h
3-
ST
A
T
E Output
s
74LVQ241
Low Voltage Octal Buffer/Line Driver
with 3-STATE Outputs
General Description
The LVQ241 is an octal buffer and line driver designed to
be employed as a memory address driver, clock driver and
bus oriented transmitter or receiver which provides
improved PC board density.
Features
s
Ideal for low power/low noise 3.3V applications
s
Implements patented EMI reduction circuitry
s
Available in SOIC JEDEC, SOIC EIAJ and QSOP pack-
ages
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Improved latch-up immunity
s
Guaranteed incident wave switching into 75
s
4 kV minimum ESD immunity
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Diagram
IEEE/IEC
Pin Descriptions
Connection Diagram
Truth Tables
H
=
HIGH Voltage Level
X
=
Immaterial
L
=
LOW Voltage Level
Z
=
High Impedance
Order Number
Package Number
Package Description
74LVQ241SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVQ241SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVQ241QSC
MQA20
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
Pin Names
Description
OE
1
, OE
2
3-STATE Output Enable Inputs
I
0
I
7
Inputs
O
0
O
7
Outputs
Inputs
Outputs
OE
1
I
n
(Pins 12, 14, 16, 18)
L
L
L
L
H
H
H
X
Z
Inputs
Outputs
OE
2
I
n
(Pins 3, 5, 7, 9)
L
X
Z
H
H
H
H
L
L
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2
74L
VQ
241
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
(Note 2)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rat-
ings.The "Recommended Operating Conditions" table will define the condi-
tions for actual device operation
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Incident wave switching on transmission lines with impedances as low as 75
for commercial temperature range is guaranteed for 74LVQ.
Note 6: Worst case package.
Note 7: Max number of outputs defined as (n). Data Inputs are driven 0V to 3.3V. One output @ GND.
Note 8: Max number of Data Inputs (n) switching. n
-
1 Inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f
=
1 MHz.
Supply Voltage (V
CC
)
-
0.5V to
+
7.0V
DC Input Diode Current (I
IK
)
V
I
=
-
0.5V
-
20 mA
V
I
=
V
CC
+
0.5V
+
20 mA
DC Input Voltage (V
I
)
-
0.5V to V
CC
+
0.5V
DC Output Diode Current (I
OK
)
V
O
=
-
0.5V
-
20 mA
V
O
=
V
CC
+
0.5V
+
20 mA
DC Output Voltage (V
O
)
-
0.5V to V
CC
+
0.5V
DC Output Source
or Sink Current (I
O
)
50 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
)
400 mA
Storage Temperature (T
STG
)
-
65
C to
+
150
C
DC Latch-Up Source or
Sink
Current
300 mA
Supply Voltage (V
CC
)
2.0V to 3.6V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
-
40
C to
+
85
C
Minimum Input Edge Rate
V/
t
V
IN
0.8V to 2.0V
V
CC
@ 3.0V
125 mV/ns
Symbol
Parameter
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
(V)
Typ
Guaranteed Limits
V
IH
Minimum High Level
3.0
1.5
2.0
2.0
V
V
OUT
=
0.1V
Input Voltage
or V
CC
-
0.1V
V
IL
Maximum Low Level
3.0
1.5
0.8
0.8
V
V
OUT
=
0.1V
Input Voltage
or V
CC
-
0.1V
V
OH
Minimum High Level
3.0
2.99
2.9
2.9
V
I
OUT
=
-
50
A
Output Voltage
3.0
2.58
2.48
V
V
IN
=
V
IL
or V
IH
(Note 3)
I
OH
=
-
12 mA
V
OL
Maximum Low Level
3.0
0.002
0.1
0.1
V
I
OUT
=
50
A
Output Voltage
3.0
0.36
0.44
V
V
IN
=
V
IL
or V
IH
(Note 3)
I
OL
=
12 mA
I
IN
Maximum Input
3.6
0.1
1.0
A
V
I
=
V
CC
,
Leakage Current
GND
I
OLD
Minimum Dynamic
3.6
36
mA
V
OLD
=
0.8V Max (Note 5)
I
OHD
Output Current (Note 4)
3.6
-
25
mA
V
OHD
=
2.0V Min (Note 5)
I
CC
Maximum Quiescent
3.6
4.0
40.0
A
V
IN
=
V
CC
Supply Current
or GND
I
OZ
Maximum 3-STATE
3.6
0.25
2.5
A
V
I
(OE)
=
V
IL
, V
IH
Leakage Current
V
I
=
V
CC
, GND
V
O
=
V
CC
, GND
V
OLP
Quiet Output
3.3
0.4
0.8
V
(Note 6)(Note 7)
Maximum Dynamic V
OL
V
OLV
Quiet Output
3.3
-
0.4
-
0.8
V
(Note 6)(Note 7)
Minimum Dynamic V
OL
V
IHD
Maximum High Level
3.3
1.6
2.0
V
(Note 6)(Note 8)
Dynamic Input Voltage
V
ILD
Maximum Low Level
3.3
1.6
0.8
V
(Note 6)(Note 8)
Dynamic Input Voltage
3
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7
4
L
V
Q241
AC Electrical Characteristics
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by design.
Capacitance
Note 10: C
PD
is measured at 10 MHz.
Symbol
Parameter
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
V
CC
C
L
=
50 pF
C
L
=
50 pF
(V)
Min
Typ
Max
Min
Max
t
PHL
Propagation Delay
2.7
2.0
7.8
12.7
2.0
14.0
ns
t
PLH
Data to Output
3.3
0.3
2.0
6.5
9.0
2.0
9.5
t
PZL
Output Enable Time
2.7
2.5
9.6
18.3
2.5
19.0
ns
t
PZH
3.3
0.3
2.5
8.0
13.0
2.5
13.5
t
PHZ
Output Disable Time
2.7
1.0
10.2
20.4
1.0
21.0
ns
t
PLZ
3.3
0.3
1.0
8.5
14.5
1.0
15.0
t
OSHL
Output to Output
2.7
1.0
1.5
1.5
ns
t
OSLH
Skew Data to Output (Note 9)
3.3
0.3
1.0
1.5
1.5
Symbol
Parameter
Typ
Units
Conditions
C
IN
Input Capacitance
4.5
pF
V
CC
=
Open
C
PD
(Note 10)
Power Dissipation Capacitance
70
pF
V
CC
=
3.3V
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4
74L
VQ
241
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package Number M20B
5
www.fairchildsemi.com
7
4
L
V
Q241
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
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