74LVQ273
Low Voltage Octal D-Type Flip-Flop
General Description
The LVQ273 has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered
Clock (CP) and Master Reset (MR) input load and reset
(clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D in-
put, one setup time before the LOW-to-HIGH clock transi-
tion, is transferred to the corresponding flip-flop's Q output.
All outputs will be forced LOW independently of Clock or
Data inputs by a LOW voltage level on the MR input. The de-
vice is useful for applications where the true output only is re-
quired and the Clock and Master Reset are common to all
storage elements.
Features
n
Ideal for low power/low noise 3.3V applications
n
Implements patented EMI reduction circuitry
n
Available in SOIC JEDEC, SOIC EIAJ and QSOP
packages
n
Guaranteed simultaneous switching noise level and
dynamic threshold performance
n
Improved latch-up immunity
n
Guaranteed incident wave switching into 75
n
4 kV minimum ESD immunity
Ordering Code:
Order Number
Package Number
Package Description
74LVQ273SC
M20B
20-Lead (0.300" Wide) Molded Small Outline Package, SOIC JEDEC
74LVQ273SJ
M20D
20-Lead Shrink Molded Small Outline Package, SOIC EIAJ
74LVQ273QSC
MQA20
20-Lead (0.150" Wide) Molded Shrink Small Outline Package, SSOP JEDEC
Devices also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
Description
D
0
D
7
Data Inputs
MR
Master Reset
CP
Clock Pulse Input
Q
0
Q
7
Data Outputs
DS011358-1
IEEE/IEC
DS011358-2
Pin Assignment for
SOIC and QSOP
DS011358-3
April 1998
74L
VQ273
Low
V
oltage
Octal
D-T
ype
Flip-Flop
1998 Fairchild Semiconductor Corporation
DS011358
www.fairchildsemi.com
Absolute Maximum Ratings
(Note 1)
Supply Voltage (V
CC
)
-0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
= -0.5V
-20 mA
V
I
= V
CC
+ 0.5V
+20 mA
DC Input Voltage (V
I
)
-0.5V to V
CC
+ 0.5V
DC Output Diode Current (I
OK
)
V
O
= -0.5V
-20 mA
V
O
= V
CC
+ 0.5V
+20 mA
DC Output Voltage (V
O
)
-0.5V to V
CC
+ 0.5V
DC Output Source
or Sink Current (I
O
)
50 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
)
400 mA
Storage Temperature (T
STG
)
-65C to +150C
DC Latch-up Source or
Sink Current
300 mA
Recommended Operating
Conditions
(Note 2)
Supply Voltage (V
CC
)
2.0V to 3.6V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
-40C to +85C
Minimum Input Edge Rate
V/
t
V
IN
from 0.8V to 2.0V
V
CC
@
3.0V
125 mV/ns
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be op-
erated at these limits. The parametric values defined in the Electrical Charac-
teristics tables are not guaranteed at the absolute maximum ratings. The
"Recommended Operating Conditions" table will define the conditions for ac-
tual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
V
CC
T
A
= +25C
T
A
= -40C to +85C
Units
Conditions
(V)
Typ
Guaranteed Limits
V
IH
Minimum High Level
3.0
1.5
2.0
2.0
V
V
OUT
= 0.1V
Input Voltage
or V
CC
- 0.1V
V
IL
Maximum Low Level
3.0
1.5
0.8
0.8
V
V
OUT
= 0.1V
Input Voltage
or V
CC
- 0.1V
V
OH
Minimum High Level
3.0
2.99
2.9
2.9
V
I
OUT
= -50 A
Output Voltage
3.0
2.58
2.48
V
V
IN
= V
IL
or V
IH
(Note 3)
I
OH
= -12 mA
V
OL
Maximum Low Level
3.0
0.002
0.1
0.1
V
I
OUT
= 50 A
Output Voltage
3.0
0.36
0.44
V
V
IN
= V
IL
or V
IH
(Note 3)
I
OL
= 12 mA
I
IN
Maximum Input
3.6
0.1
1.0
A
V
I
= V
CC
, GND
Leakage Current
I
OLD
Minimum Dynamic
3.6
36
mA
V
OLD
= 0.8V Max (Note 5)
I
OHD
Output Current (Note 4)
3.6
-25
mA
V
OHD
= 2.0V Min (Note 5)
I
CC
Maximum Quiescent
3.6
4.0
40.0
A
V
IN
= V
CC
or GND
Supply Current
V
OLP
Quiet Output
3.3
0.4
0.8
V
(Notes 6, 7)
Maximum Dynamic V
OL
V
OLV
Quiet Output
3.3
-0.3
-0.8
V
(Notes 6, 7)
Minimum Dynamic V
OL
V
IHD
Maximum High Level
3.3
1.7
2.0
V
(Notes 6, 8)
Dynamic Input Voltage
V
ILD
Maximum Low Level
3.3
1.6
0.8
V
(Notes 6, 8)
Dynamic Input Voltage
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Incident wave switching on transmission lines with impedances as low as 75
for commercial temperature range is guaranteed for.
Note 6: Worst case package.
Note 7: Max number of outputs defined as (n). Data Inputs are driven 0V to 3.3V; one output at GND.
Note 8: Max number of Data Inputs (n) switching. (n - 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V
ILD
), 0V to threshold (V
IHD
),
f = 1 MHz.
www.fairchildsemi.com
2
AC Electrical Characteristics
T
A
= +25C
T
A
= -40C to +85C
Symbol
Parameter
V
CC
(V)
C
L
= 50 pF
C
L
= 50 pF
Units
Min
Typ
Max
Min
Max
f
max
Maximum Clock
2.7
50
45
MHz
Frequency
3.3
0.3
90
75
t
PLH
Propagation Delay
2.7
4.0
9.6
17.6
3.0
20.0
ns
CP to Q
n
3.3
0.3
4.0
8.0
12.5
3.0
14.0
t
PHL
Propagation Delay
2.7
4.0
10.2
18.3
3.5
20.5
ns
CP to Q
n
3.3
0.3
4.0
8.5
13.0
3.5
14.5
t
PHL
Propagation Delay
2.7
4.0
10.2
18.3
3.5
20.0
ns
MR to Q
n
3.3
0.3
4.0
8.5
13.0
3.5
14.0
t
OSHL
Output to Output
2.7
1.0
1.5
1.5
ns
t
OSLH
Skew (Note 9)
3.3
0.3
1.0
1.5
1.5
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device. The
specification applies to any outputs switching in the same direction, either HIGH to LOW (t
OSHL
) or LOW to HIGH (t
OSLH
). Parameter guaranteed by design. Not
tested.
AC Operating Requirements
Symbol
Parameter
V
CC
(V)
T
A
= +25C
T
A
= -40C to +85C
Units
C
L
= 50 pF
C
L
= 50 pF
Typ
Guaranteed Minimum
t
S
Setup Time, HIGH or LOW
2.7
6.5
8.5
ns
D
n
to CP
3.3
0.3
5.0
6.0
t
H
Hold Time, HIGH or LOW
2.7
0.0
0.0
ns
D
n
to CP
3.3
0.3
0.0
0.0
t
W
Clock Pulse Width
2.7
7.0
8.5
ns
HIGH or LOW
3.3
0.3
5.5
6.0
t
W
MR Pulse Width
2.7
7.0
8.5
ns
HIGH or LOW
3.3
0.3
5.5
6.0
t
W
Recovery Time
2.7
5.0
6.5
ns
MR to CP
3.3
0.3
4.0
4.5
Capacitance
Symbol
Parameter
Typ
Units
Conditions
C
IN
Input Capacitance
4.5
pF
V
CC
= Open
C
PD
(Note 10)
Power Dissipation Capacitance
35
pF
V
CC
= 3.3V
Note 10: C
PD
is measured at 10 MHz.
3
www.fairchildsemi.com
4
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead (0.300" Wide) Molded Small Outline Package, SOIC JEDEC
Package Number M20B
20-Lead Shrink Molded Small Outline Package, SOIC EIAJ
Package Number M20D
5
www.fairchildsemi.com
PDF 
ZIP