2005 Fairchild Semiconductor Corporation
DS012445
www.fairchildsemi.com
March 1999
Revised June 2005
7
4
L
V
T1
62244
74L
VTH162244
Low
V
o
l
t
age
16-Bi
t
Buff
er/
L
i
ne Dr
iver
wit
h
3-ST
A
T
E Out
put
s an
d 25
:
S
e
ri
es
Res
i
st
ors in the
Outp
ut
s
74LVT162244 74LVTH162244
Low Voltage 16-Bit Buffer/Line Driver
with 3-STATE Outputs
and 25
:
Series Resistors in the Outputs
General Description
The LVT162244 and LVTH162244 contain sixteen non-
inverting buffers with 3-STATE outputs designed to be
employed as a memory and address driver, clock driver, or
bus oriented transmitter/receiver. The device is nibble con-
trolled. Individual 3-STATE control inputs can be shorted
together for 8-bit or 16-bit operation.
The LVT162244 and LVTH162244 are designed with
equivalent 25
:
series resistance in both the HIGH and
LOW states of the output. This design reduces line noise in
applications such as memory address drivers, clock driv-
ers, and bus transceivers/transmitters.
The LVTH162244 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These buffers and line drivers are designed for low-voltage
(3.3V) V
CC
applications, but with the capability to provide a
TTL interface to a 5V environment. The LVT162244 and
LVTH162244 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining a low power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH162244),
also available without bushold feature (74LVT162244).
s
Live insertion/extraction permitted
s
Power Up/Power Down high impedance provides glitch-
free bus loading
s
Outputs include equivalent series resistance of 25
:
to
make external termination resistors unnecessary and
reduce overshoot and undershoot
s
Functionally compatible with the 74 series 162244
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human-body model
!
2000V
Machine model
!
200V
Charged-device
!
1000V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Ordering Code:
Note 1: Ordering code "G" indicates Trays.
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Order Number
Package
Number
Package Description
74LVT162244G
(Note 1)(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVT162244MEA
(Note 2)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVT162244MTD
(Note 2)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74LVTH162244G
(Note 1)(Note 2)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVTH162244MEA
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[Tube]
74LVTH162244MEX
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
[Tape and Reel]
74LVTH162244MTD
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[Tube]
74LVTH162244MTX
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
[Tape and Reel]
www.fairchildsemi.com
4
7
4
L
V
T1
62244
74L
VTH162244
Absolute Maximum Ratings
(Note 3)
Recommended Operating Conditions
Note 3: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 4: I
O
Absolute Maximum Rating must be observed.
DC Electrical Characteristics
Symbol
Parameter
Value
Conditions
Units
V
CC
Supply Voltage
0.5 to
4.6
V
V
I
DC Input Voltage
0.5 to
7.0
V
V
O
Output Voltage
0.5 to
7.0
Output in 3-STATE
V
0.5 to
7.0
Output in HIGH or LOW State (Note 4)
I
IK
DC Input Diode Current
50
V
I
GND
mA
I
OK
DC Output Diode Current
50
V
O
GND
mA
I
O
DC Output Current
64
V
O
!
V
CC
Output at HIGH State
mA
128
V
O
!
V
CC
Output at LOW State
I
CC
DC Supply Current per Supply Pin
r
64
mA
I
GND
DC Ground Current per Ground Pin
r
128
mA
T
STG
Storage Temperature
65 to
150
q
C
Symbol
Parameter
Min
Max
Units
V
CC
Supply Voltage
2.7
3.6
V
V
I
Input Voltage
0
5.5
V
I
OH
HIGH-Level Output Current
12
mA
I
OL
LOW-Level Output Current
12
mA
T
A
Free Air Operating Temperature
40
85
q
C
'
t/
'
V
Input Edge Rate, V
IN
0.8V2.0V, V
CC
3.0V
0
10
ns/V
Symbol
Parameter
V
CC
T
A
40
q
C to
85
q
C
Units
Conditions
(V)
Min
Max
V
IK
Input Clamp Diode Voltage
2.7
1.2
V
I
I
18 mA
V
IH
Input HIGH Voltage
2.73.6
2.0
V
V
O
d
0.1V or
V
IL
Input LOW Voltage
2.73.6
0.8
V
V
O
t
V
CC
0.1V
V
OH
Output HIGH Voltage
2.73.6
V
CC
0.2
V
I
OH
100
P
A
3.0
2.0
I
OH
12 mA
V
OL
Output LOW Voltage
2.7
0.2
V
I
OL
100
P
A
3.0
0.8
I
OL
12 mA
I
I(HOLD)
Bushold Input Minimum Drive
3.0
75
P
A
V
I
0.8V
(Note 5)
75
V
I
2.0V
I
I(OD)
Bushold Input Over-Drive
3.0
500
P
A
(Note 6)
(Note 5)
Current to Change State
500
(Note 7)
I
I
Input Current
3.6
10
P
A
V
I
5.5V
Control Pins
3.6
r
1
V
I
0V or V
CC
Data Pins
3.6
5
V
I
0V
1
V
I
V
CC
I
OFF
Power Off Leakage Current
0
r
100
P
A
0V
d
V
I
or V
O
d
5.5V
I
PU/PD
Power Up/Down
01.5V
r
100
P
A
V
O
0.5V to 3.0V
3-STATE Current
V
I
GND or V
CC
I
OZL
3-STATE Output Leakage Current
3.6
5
P
A
V
O
0.5V
I
OZH
3-STATE Output Leakage Current
3.6
5
P
A
V
O
3.0V
I
OZH
3-STATE Output Leakage Current
3.6
10
P
A
V
CC
V
O
d
5.5V
I
CCH
Power Supply Current
3.6
0.19
mA
Outputs HIGH
I
CCL
Power Supply Current
3.6
5
mA
Outputs LOW
I
CCZ
Power Supply Current
3.6
0.19
mA
Outputs Disabled
5
www.fairchildsemi.com
7
4
L
V
T1
62244
74L
VTH162244
DC Electrical Characteristics
(Continued)
Note 5: Applies to bushold versions only (74LVTH162244).
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than V
CC
or GND.
Dynamic Switching Characteristics
(Note 9)
Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10: Max number of outputs defined as (n). n
1 data inputs are driven 0V to 3V. Output under test held LOW.
AC Electrical Characteristics
Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Capacitance
(Note 12)
Note 12: Capacitance is measured at frequency f
1 MHz, per MIL-STD-883, Method 3012.
Symbol
Parameter
V
CC
T
A
40
q
C to
85
q
C
Units
Conditions
(V)
Min
Max
I
CCZ
Power Supply Current
3.6
0.19
mA
V
CC
d
V
O
d
5.5V,
Outputs Disabled
'
I
CC
Increase in Power Supply Current
3.6
0.2
mA
One Input at V
CC
0.6V
(Note 8)
Other Inputs at V
CC
or GND
Symbol
Parameter
V
CC
T
A
25
q
C
Units
Conditions
(V)
Min
Typ
Max
C
L
50 pF, R
L
500
:
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3
0.8
V
(Note 10)
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3
0.8
V
(Note 10)
Symbol
Parameter
T
A
40
q
C to
85
q
C, C
L
50 pF, R
L
500
:
Units
V
CC
3.3V
r
0.3V
V
CC
2.7V
Min
Max
Min
Max
t
PLH
Propagation Delay Data to Output
1.4
4.0
1.4
4.8
ns
t
PHL
1.2
3.7
1.2
4.1
t
PZH
Output Enable Time
1.2
5.1
1.2
6.5
ns
t
PZL
1.4
5.4
1.4
6.9
t
PHZ
Output Disable Time
2.0
5.0
2.0
5.4
ns
t
PLZ
1.5
5.0
1.5
5.4
t
OSHL
Output to Output Skew
1.0
1.0
ns
t
OSLH
(Note 11)
Symbol
Parameter
Conditions
Typical
Units
C
IN
Input Capacitance
V
CC
0V, V
I
0V or V
CC
4
pF
C
OUT
Output Capacitance
V
CC
3.0V, V
O
0V or V
CC
8
pF
PDF 
ZIP
