May 1993
Revised March 1999
7
4
L
VX17
4
Low V
o
l
t
a
ge
Hex D-T
ype Fli
p
-
F
lop wit
h
Mast
er Reset
1999 Fairchild Semiconductor Corporation
DS011607.prf
www.fairchildsemi.com
74LVX174
Low Voltage Hex D-Type Flip-Flop with Master Reset
General Description
The LVX174 is a high-speed hex D flip-flop. The device is
used primarily as a 6-bit edge-triggered storage register.
The information on the D inputs is transferred to storage
during the LOW-to-HIGH clock transition. The device has a
Master Reset to simultaneously clear all flip-flops.
Features
s
Input voltage level translation from 5V to 3V
s
Ideal for low power/low noise 3.3V applications
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number
Package Number
Package Description
74LVX174M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LVX174SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVX174MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names
Description
D
0
D
5
Data Inputs
CP
Clock Pulse Input
MR
Master Reset Input
Q
0
Q
5
Outputs
www.fairchildsemi.com
2
74
L
VX174
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
=
LOW-to-HIGH Transition
Logic Diagram
Operating Mode
Inputs
Outputs
MR
CP
D
n
Q
n
Reset (Clear)
L
X
X
L
Load `1'
H
H
H
Load `0'
H
L
L
3
www.fairchildsemi.com
74
L
V
X
1
74
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
(Note 2)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Noise Characteristics
(Note 3)
Note 3: (Input t
r
=
t
f
=
3 ns)
Supply Voltage (V
CC
)
-
0.5V to
+
7.0V
DC Input Diode Current (I
IK
)
V
I
=
-
0.5V
-
20 mA
DC Input Voltage (V
I
)
-
0.5V to 7V
DC Output Diode Current (I
OK
)
V
O
=
-
0.5V
-
20 mA
V
O
=
V
CC
+
0.5V
+
20 mA
DC Output Voltage (V
O
)
-
0.5V to V
CC
+
0.5V
DC Output Source
or Sink Current (I
O
)
25 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
)
50 mA
Storage Temperature (T
STG
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
180 mW
Supply Voltage (V
CC
)
2.0V to 3.6V
Input Voltage (V
I
)
0V to 5.5V
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
-
40
C to
+
85
C
Input Rise and Fall Time (
t/
V)
0 ns/V to 100 ns/V
Symbol
Parameter
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
Min
Typ
Max
Min
Max
V
IH
HIGH Level
2.0
1.5
1.5
Input Voltage
3.0
2.0
2.0
V
3.6
2.4
2.4
V
IL
LOW Level
2.0
0.5
0.5
Input Voltage
3.0
0.8
0.8
V
3.6
0.8
0.8
V
OH
HIGH Level
2.0
1.9
2.0
1.9
V
IN
=
V
IL
or V
IH
I
OH
=
-
50
A
Output Voltage
3.0
2.9
3.0
2.9
V
I
OH
=
-
50
A
3.0
2.58
2.48
I
OH
=
-
4 mA
V
OL
LOW Level
2.0
0.0
0.1
0.1
V
IN
=
V
IL
or V
IH
I
OL
=
50
A
Output Voltage
3.0
0.0
0.1
0.1
V
I
OL
=
50
A
3.0
0.36
0.44
I
OL
=
4 mA
I
IN
Input Leakage Current
3.6
0.1
1.0
A
V
IN
=
5.5V or GND
I
CC
Quiescent Supply Current
3.6
4.0
40.0
A
V
IN
=
V
CC
or GND
Symbol
Parameter
V
CC
(V)
T
A
=
25
C
Units
C
L
(pF)
Typ
Limit
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3
0.3
0.5
V
50
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3
-
0.3
-
0.5
V
50
V
IHD
Minimum HIGH Level Dynamic Input Voltage
3.3
2.0
V
50
V
ILD
Maximum LOW Level Dynamic Input Voltage
3.3
0.8
V
50
www.fairchildsemi.com
4
74
L
VX174
AC Electrical Characteristics
Note 4: Parameter guaranteed by design. t
OSLH
=
|t
PLHm
-
t
PLHn
|, t
OSHL
=
|t
PHLm
-
t
PHLn
|
Capacitance
Note 5: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Symbol
Parameter
V
CC
(V)
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
C
L
(pF)
Min
Typ
Max
Min
Max
t
PLH
Propagation
2.7
7.6
14.5
1.0
17.5
ns
15
t
PHL
Delay Time
10.1
18.0
1.0
21.0
50
CP to Q
n
3.3
0.3
5.9
9.3
1.0
11.0
15
8.4
12.8
1.0
14.5
50
t
PHL
Propagation Delay
2.7
7.9
15.0
1.0
18.5
ns
15
MR to Q
n
10.4
18.5
1.0
22.0
50
3.3
0.3
6.2
9.7
1.0
11.5
15
8.7
13.2
1.0
15.0
50
t
S
Setup Time
2.7
7.5
8.5
ns
D
n
to CP
3.3
0.3
5.0
6.0
t
H
Hold Time
2.7
0
0
D
n
to CP
3.3
0.3
0
0
t
REC
Removal Time
2.7
4.5
4.5
ns
MR to CP
3.3
0.3
3.0
3.0
t
W
Clock Pulse
2.7
6.5
7.5
Width
3.3
0.3
5.0
5.0
t
W
MR Pulse
2.7
6.5
7.5
ns
Width
3.3
0.3
5.0
5.0
f
MAX
Maximum Clock
2.7
65
130
55
MHz
15
Frequency
45
60
40
50
3.3
0.3
115
180
95
15
65
95
55
50
t
OSLH
Output to Output
2.7
1.5
1.5
ns
50
t
OSHL
Skew (Note 4)
3.3
1.5
1.5
Symbol
Parameter
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
Min
Typ
Max
Min
Max
C
IN
Input Capacitance
4
10
10
pF
C
PD
Power Dissipation Capacitance (Note 5)
29
pF
5
www.fairchildsemi.com
74
L
V
X
1
74
Physical Dimensions
inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
PDF 
ZIP