June 1997
Revised April 1999
7
4
VH
CT5
40A
Oct
a
l Buff
er/
L
ine Dri
ver wit
h
3-
ST
A
T
E Output
s
1999 Fairchild Semiconductor Corporation
DS500012.prf
www.fairchildsemi.com
74VHCT540A
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHCT540A is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It achieves
the high-speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation.
The VHCT540A is an octal buffer/line driver designed to be
employed as memory and address drivers, clock drivers
and bus oriented transmitter/receivers.
This device is similar in function to the VHCT240A while
providing flow-through architecture (inputs on opposite side
from outputs). This pinout arrangement makes this device
especially useful as an output port for microprocessors,
allowing ease of layout and greater PC board density.
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. This device can be used to interface 3V to
5V systems and two supply systems such as battery
backup. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note 1: Outputs in OFF-STATE
Features
s
High Speed:
t
PD
=
5.4 ns (typ) at V
CC
=
5V
s
Low Power Dissipation:
I
CC
=
4
A (max) at T
A
=
25
C
s
Power down protection is provided on all inputs and
outputs
s
Pin and function compatible with 74HCT540
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
IEEE/IEC
Pin Descriptions
Connection Diagram
Truth Table
H
=
HIGH Voltage Level
X
=
Immaterial
L
=
LOW Voltage Level
Z
=
High Impedance
Order Number
Package Number
Package Dissipation
74VHCT540AM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74VHCT540ASJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT540AMTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHCT540AN
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names
Description
OE
1
, OE
2
3-STATE Output Enable Inputs
I
0
- I
7
Inputs
O
0
- O
7
3-STATE Outputs
Inputs
Outputs
OE
1
OE
2
I
L
L
H
L
H
X
X
Z
X
H
X
Z
L
L
L
H
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2
7
4
VH
CT54
0A
Absolute Maximum Ratings
(Note 2)
Recommended Operating
Conditions
(Note 6)
Note 2: Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside databook specifica-
tions.
Note 3: When outputs are in OFF-STATE or when V
CC
=
OV.
Note 4: HIGH or LOW state. I
OUT
absolute maximum rating must be
observed.
Note 5: V
OUT
<
GND, V
OUT
>
V
CC (outputs active).
Note 6: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Noise Characteristics
Note 7: Parameter guaranteed by design.
Supply Voltage (V
CC
)
-
0.5V to
+
7.0V
DC Input Voltage (V
IN
)
-
0.5V to
+
7.0V
DC Output Voltage (V
OUT
)
(Note 3)
-
0.5V to
+
7.0V
(Note 4)
-
0.5V to V
CC
+
0.5V
Input Diode Current (I
IK
)
-
20 mA
Output Diode Current (I
OK
)
(Note 5)
20 mA
DC Output Current (I
OUT
)
25 mA
DC V
CC
/GND Current (I
CC
)
75 mA
Storage Temperature (T
STG
)
-
65
C to
+
150
C
Lead Temperature (T
L
)
(Soldering, 10 seconds)
260
C
Supply Voltage (V
CC
)
4.5V to
+
5.5V
Input Voltage (V
IN
)
0V to
+
5.5V
Output Voltage (V
OUT
)
(Note 4)
0V to V
CC
(Note 3)
0V to 5.5V
Operating Temperature (T
OPR
)
-
40
C to
+
85
C
Input Rise and Fall Time (t
r
, t
f
)
V
CC
=
5.0V
0.5V
0
20 ns/V
Symbol
Parameter
V
CC
(V)
T
A
=
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
Min
Typ
Max
Min
Max
V
IH
HIGH Level Input Voltage
4.5
-
5.5
2.0
2.0
V
V
IL
LOW Level Input Voltage
4.5
-
5.5
0.8
0.8
V
V
OH
HIGH Level
4.5
4.4
4.5
4.4
V
V
IN
=
V
IH
I
OH
=
-
50
A
Output Voltage
4.5
3.94
3.80
V
or V
IL
I
OH
=
-
8 mA
V
OL
LOW
Level 4.5
0.0
0.1
0.1
V
V
IN
=
V
IH
I
OL
=
50
A
Output Voltage
4.5
0.36
0.44
V
or V
IL
I
OL
=
8 mA
I
OZ
3-STATE Output
OFF-STATE Current
5.5
0.25
2.5
A
V
IN
=
V
IH
or V
IL
V
OUT
=
V
CC
or GND
I
IN
Input Leakage Current
0
-
5.5
0.1
1.0
A
V
IN
=
5.5V or GND
I
CC
Quiescent Supply Current
5.5
4.0
40.0
A
V
IN
=
V
CC
or GND
I
CCT
Maximum I
CC/input
5.5
1.35
1.50
mA
V
IN
=
3.4V
other inputs
=
V
CC
or GND
I
OFF
Output Leakage Current
0
0.5
5.0
A
V
OUT
=
5.5V
Symbol
Parameter
V
CC
(V)
T
A
=
25
C
Units
Conditions
Typ
Limits
V
OLP
Quiet Output Maximum
5.0
1.2
1.6
V
C
L
=
50 pF
(Note 7)
Dynamic V
OL
V
OLV
Quiet Output Minimum
5.0
-
1.2
1.6
V
C
L
=
50 pF
(Note 7)
Dynamic V
OL
V
IHD
Minimum HIGH Level Dynamic
5.0
2.0
V
C
L
=
50 pF
(Note 7)
Input Voltage
V
ILD
Maximum HIGH Level Dynamic
5.0
0.8
V
C
L
=
50 pF
(Note 7)
Input Voltage
3
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7
4
VH
CT5
40A
AC Electrical Characteristics
Note 8: Parameter guaranteed by design. t
OSLH
=
|t
PLHmax
-
t
PLHmin
|; t
OSLH
=
|t
PHLmax
-
t
PHLmin
|.
Note 9: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: I
CC
(opr.)
=
C
PD
* V
CC
* f
IN
+
I
CC
/8 (per bit).
Symbol
Parameter
V
CC
(V)
T
A
=
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
5.0
0.5
5.4
7.4
1.0
8.5
ns
C
L
=
15 pF
t
PHL
Time
5.9
8.4
1.0
9.5
C
L
=
50 pF
t
PZL
3-STATE Output
5.0
0.5
8.3
11.3
1.0
13.0
ns
R
L
=
1 k
C
L
=
15 pF
t
PZH
Enable Time
8.8
12.3
1.0
14.0
C
L
=
50 pF
t
PLZ
3-STATE Output
5.0
0.5
9.4
11.9
1.0
13.5
ns
R
L
=
1 k
C
L
=
50 pF
t
PHZ
Disable Time
t
OSLH
Output to Output
5.0
0.5
1.0
1.0
ns
(Note 8)
C
L
=
50 pF
t
OSHL
Skew
C
IN
Input Capacitance
4
10
10
pF
V
CC
=
Open
C
OUT
Output Capacitance
9
pF
V
CC
=
5.0V
C
PD
Power Dissipation Capacitance
19
pF
(Note 9)
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4
7
4
VH
CT54
0A
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M20D
5
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7
4
VH
CT5
40A
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC20
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