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Электронный компонент: CD4007C

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October 1987
Revised January 1999
CD400
7C Dual
Complement
ar
y
P
a
ir
Pl
us I
n
ver
t
e
r
1999 Fairchild Semiconductor Corporation
DS005943.prf
www.fairchildsemi.com
CD4007C
Dual Complementary Pair Plus Inverter
General Description
The CD4007C consists of three complementary pairs of N-
and P-channel enhancement mode MOS transistors suit-
able for series/shunt applications. All inputs are protected
from static discharge by diode clamps to V
DD
and V
SS
.
For proper operation the voltages at all pins must be con-
strained to be between V
SS
-
0.3V and V
DD
+
0.3V at all
times.
Features
s
Wide supply voltage range:
3.0V to 15V
s
High noise immunity:
0.45 V
CC
(typ.)
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Note: All P-channel substrates are connected to V
DD
and all N-channel substrates are connected to V
SS
.
Top View
Order Number
Package Number
Package Description
CD4007CM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
CD4007CN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS001, 0.300" Wide
www.fairchildsemi.com
2
CD400
7C
Absolute Maximum Ratings
(Note 1)
Note 1: This device should not be connected to circuits with the power on
because high transient voltages may cause permanent damage.
DC Electrical Characteristics
AC Electrical Characteristics
(Note 2)
T
A
=
25
C and C
L
=
15 pF and rise and fall times
=
20 ns. Typical temperature coefficient for all values of V
DD
=
0.3%/
C
Note 2: AC Parameters are guaranteed by DC correlated testing.
Voltage at Any Pin
V
SS
-
0.3V to V
DD
+
0.3V
Operating Temperature Range
-
40
C to
+
85
C
Storage Temperature Range
-
65
C to
+
150
C
Power Dissipation (P
D
)
Dual-In-Line
700 mW
Small Outline
500 mW
Operating V
DD
Range
V
SS
+
3.0V to V
SS
+
15V
Lead Temperature
(Soldering, 10 seconds)
260
C
Limits
Symbol
Parameter
Conditions
-
40
C
+
25
C
+
85
C
Units
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
I
L
Quiescent Device
V
DD
=
5.0V
0.5
0.005
0.05
15
A
Current
V
DD
=
10V
1.0
0.005
1.0
30
A
P
D
Quiescent Device
V
DD
=
5.0V
2.5
0.025
2.5
75
W
Dissipation Package
V
DD
=
10V
10
0.05
10
300
W
V
OL
Output Voltage
V
DD
=
5.0V
0.05
0
0.01
0.05
V
LOW Level
V
DD
=
10V
0.05
0
0.01
0.05
V
V
OH
Output Voltage
V
DD
=
5.0V
4.95
4.95
5.0
4.95
V
HIGH Level
V
DD
=
10V
9.95
9.95
10
9.95
V
V
NL
Noise Immunity
V
DD
=
5.0V, V
O
=
3.6V
1.5
2.25
1.5
1.4
V
(All inputs)
V
DD
=
10V, V
O
=
7.2V
3.0
4.5
3.0
2.9
V
V
NH
Noise Immunity
V
DD
=
5.0V, V
O
=
0.95V
3.6
3.5
2.25
3.5
V
(All Inputs)
V
DD
=
10V, V
O
=
2.9V
7.1
7.0
4.5
7.0
V
I
D
N
Output Drive Current
V
DD
=
5.0V, V
O
=
0.4V, V
I
=
V
DD
0.35
0.3
1.0
0.24
mA
N-Channel
V
DD
=
10V, V
O
=
0.5V, V
I
=
V
DD
1.2
1.0
2.5
0.8
mA
I
D
P
Output Drive Current
V
DD
=
5.0V, V
O
=
2.5V, V
I
=
V
SS
-
1.3
-
1.1
-
4.0
-
0.9
mA
P-Channel
V
DD
=
10V, V
O
=
9.5V, V
I
=
V
SS
-
0.65
-
0.55
-
2.5
-
0.45
mA
I
I
Input Current
10
pA
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PLH
=
t
PHL
Propagation Delay Time
V
DD
=
5.0V
35
75
ns
V
DD
=
10V
20
50
ns
t
TLH
=
t
THL
Transition Time
V
DD
=
5.0V
50
100
ns
V
DD
=
10V
30
50
ns
C
I
Input Capacitance
Any Input
5
pF
3
www.fairchildsemi.com
CD400
7C
AC Test Circuits
Switching Time Waveforms
www.fairchildsemi.com
4
CD400
7C
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150" Narrow
Package Number M14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
CD400
7C Dual
Complement
ar
y
P
a
ir
Pl
us I
n
ver
t
e
r
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N14A