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Электронный компонент: FAN6555

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www.fairchildsemi.com
REV. 1.1.3 8/4/03
Features
Can source and sink up to 2A continous, 3A peak
No heatsink required
Integrated Power MOSFETs
Generates termination voltages for DDR SDRAM
V
REF
input available for external voltage divider
Separate voltages for V
CCQ
and PV
DD
Buffered V
REF
output
V
OUT
of 3% or less at 2A
Minimum external components
16-pin SOIC package
-40C to +85C operating temperature range
Shutdown for standby or suspend mode operation
Thermal Shutdown
130C
Description
The FAN6555 switching regulator is designed to convert
voltage supplies ranging from 2.3V to 4V into a desired out-
put voltage or termination voltage for DDR SDRAM mem-
ory. The FAN6555 can be implemented to produce regulated
output voltages in two different modes. In the default mode,
when the V
REF
pin is open, the FAN6555 output voltage is
50% of the voltage applied to V
CCQ
. The FAN6555 can also
be used to produce various user-defined voltages by forcing a
voltage on the VREF
IN
pin. In this case, the output voltage
follows the input VREF
IN
voltage. The switching regulator
is capable of sourcing or sinking up to 2A of current while
regulating an output V
TT
voltage to within 3% or less.
Transient output currents of 3A can also be accommodated.
The FAN6555 can also be used in conjunction with series
termination resisitors to provide an excellent voltage source
for active termination schemes of high speed transmission
lines as those seen in high speed memory buses and distrib-
uted backplane designs.
Block Diagram
VL2
AGND
13
VREFIN
VREFOUT
11
6
VDD
1
SHDN
12
PVDD2
PVDD1
7
VL1
3
+
+
AVCC
VCCQ
15
OSCILLATOR/
RAMP
GENERATOR
S
R
Q
Q
(VOUT)
(VOUT)
PGND1
DGND
VFB
PGND2
2
4
5
8
VDD
9
14
10
VREF BUFFER
ERROR AMP
RAMP
COMPARATOR
+
16
200k
200k
FAN6555
2A DDR Bus Termination Regulator
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FAN6555
PRODUCT SPECIFICATION
2
REV. 1.1.3 8/4/03
Pin Configuration
Pin Description
Pin
Name
Function
1
V
DD
Digital supply voltage
2
PV
DD1
Voltage supply for internal power transistors
3
V
L1
Output voltage/ inductor connection
4
P
GND1
Ground for output power transistors
5
P
GND2
Ground for output power transistors
6
V
L2
Output voltage/inductor connection
7
PV
DD2
Voltage supply for internal power transistors
8
D
GND
Digital ground
9
V
DD
Digital supply voltage
10
V
FB
Input for external compensation feedback
11
VREF
IN
Input for external reference voltage
12
SHDN
Shutdown active low. CMOS input level
13
AGND
Ground for internal reference voltage divider
14
VREF
OUT
Reference voltage output
15
V
CCQ
Voltage reference for internal voltage divider
16
AV
CC
Analog voltage supply
FAN6555
16-Pin SOIC (M16)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
TOP VIEW
VDD
PVDD1
VL1
PGND1
PGND2
VL2
PVDD2
DGND
AVCC
VCCQ
VREFOUT
AGND
SHDN
VREFIN
VFB
VDD
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PRODUCT SPECIFICATION
FAN6555
REV. 1.1.3 8/4/03
3
Absolute Maximum Ratings
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum
ratings are stress ratings only and functional device operation is not implied.
Operating Conditions
Electrical Characteristics
Unless otherwise specified, AV
CC
= V
DD
= PV
DD
= 3.3V 10%, T
A
= Operating Temperature Range (Note 1)
Notes
1. Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
2. AV
CC
, PV
DD
= 3.3V 10%
Parameter
Min.
Max.
Units
PV
DD
4.5
V
Voltage on Any Other Pin
GND 0.3
V
IN
+ 0.3
V
Average Switch Current (I
AVG
)
2.0
A
Junction Temperature
150
C
Storage Temperature Range
-65
150
C
Lead Temperature (Soldering, 10 sec)
300
C
Thermal Resistance: Junction to Case (
JC
)
30
C/W
Junction to Ambient (
JA
)
88
Output Current, Source or Sink (peak)
3.0
A
Parameter
Min.
Max.
Units
Temperature Range
-40
+85
C
PV
DD
Operating Range
2.0
4.0
V
V
CCQ
Operating Range
1.4
4.0
V
Symbol
Parameter
Conditions
Min.
Typ.
Max. Units
Switching Regulator
V
TT
Output Voltage, V
TT
(See Figure 1)
I
OUT
= 0,
V
REF
= open
Note 2
V
CCQ
= 2.3V
1.12
1.15
1.18
V
V
CCQ
= 2.5V
1.22
1.25
1.28
V
V
CCQ
= 2.7V
1.32
1.35
1.38
V
I
OUT
= 2A,
V
REF
= open
T
A
= 25C
Note 2
V
CCQ
= 2.3V
1.09
1.15
1.21
V
V
CCQ
= 2.5V
1.19
1.25
1.31
V
V
CCQ
= 2.7V
1.28
1.35
1.42
V
VREF
OUT
Internal Resistor Divider
I
OUT
= 0
Note 2
V
CCQ
= 2.3V 1.139
1.15
1.162
V
V
CCQ
= 2.5V 1.238
1.25
1.263
V
V
CCQ
= 2.7V 1.337
1.35
1.364
V
Z
IN
V
REF
Reference Pin Input
Impedance
Note 2
V
CCQ
= 0
100
k
Switching Frequency
650
kHz
V
OFFSET
Offset Voltage V
TT
VREF
OUT
AV
CC
= 2.5V No Load
V
CCQ
= 2.5
20
20
mV
Supply
I
Q
Quiescent Current
I
OUT
= 0, no load
V
CCQ
= 2.5V
I
VCCQ
6
10
A
I
AVCC
0.5
1.0
mA
I
AVCC
SD
0.2
0.5
mA
I
VDD
0.25
1.0
mA
I
VDD
SD
0.2
1.0
mA
I
PVDD
100
250
A
Buffer
I
REF
Output Current Capability
3
mA
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FAN6555
PRODUCT SPECIFICATION
4
REV. 1.1.3 8/4/03
Functional Description
The FAN6555 integrates two power MOSFETs that can be
used to source and sink 2A of current while maintaining a
tight voltage regulation. Using the external feedback, the
output can be regulated well within 3% or less, depending on
the external components chosen. Separate voltage supply
inputs have been added to accommodate applications with
various power supplies for the databus and power buses.
Outputs
The output voltage pins (V
L1
, V
L2
) are tied to the databus,
address, or clock lines via an external inductor. See the
Applications section for recommendations. Output voltage
is determined by the V
CCQ
or VREF
IN
inputs.
Inputs
The input voltage pins (V
CCQ
or VREF
IN
) determine the
output voltages (V
L1
or V
L2
) . In the default mode, where
the VREF
IN
pin is floating, the output voltage is 50% of the
V
CCQ
input. V
CCQ
can be the reference voltage for the
databus.
Output voltage can also be selected by forcing a voltage at
the VREF
IN
pin. In this case, the output voltage follows the
voltage at the VREF
IN
input. Simple voltage dividers can be
used in this case to produce a wide variety of output voltages
between 0.7V and V
DD
0.7V.
VREF Input and Output
The VREF
IN
input can be used to force a voltage at the
outputs (Inputs section, above). The VREF
OUT
pin is an
output pin that is driven by a small output buffer to provide
the V
REF
signal to other devices in the system. The output
buffer is capable of driving several output loads. The output
buffer can handle 3mA.
Other Supply Voltages
Several inputs are provide for the supply voltages: PV
DD1
,
PV
DD2
, AV
CC
, and V
DD
.
The PV
DD1
and PV
DD2
provide the power supply to the
power MOSFETs. V
DD
provides the voltage supply to the
digital sections, while AV
CC
supplies the voltage for the
analog sections. Again, see the Applications section for
recommendations.
Feedback Input
The V
FB
pin is an input that can be used for closed loop
compensation. This input is derived from the voltage output.
See Application section for recommendation.
Figure 1.
16
15
14
13
12
11
10
9
U1
FAN6555
VDD
PVDD1
VL1
PGND1
PGND2
VL2
PVDD2
DGND
AVCC
VCCQ
VREFOUT
AGND
SHDN
VREFIN
VFB
VDD
1
2
3
4
5
6
7
8
R3
100k
VCCQ
VREFOUT
TPI
VTT
2.5V TO 4V
SHDN
VREFIN
GND
GND
TO SDRAMS
C7 1nF
C5
470
F
C4 0.1
F
R4 100k
R5 1k
C9 0.1
F
R2 100
R1 100
C8 0.1
F
C2
0.1
F
C1
820
F
F2V
OS-CON
L1 3.3
H C3 0.1F
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PRODUCT SPECIFICATION
FAN6555
REV. 1.1.3 8/4/03
5
Applications
Using the FAN6555 for DDR Bus Termination
The circuit schematic in Figure 1 shows a recommended
approach for constructing a bus terminating solution for a
DDR bus. This circuit can be used in PC memory and Graph-
ics memory applications as shown in Figures 3 and 4. Note
that the FAN6555 can provide the voltage reference (V
REF
)
and terminating voltages (V
TT
). Using the layout
as shown in Figures 5, 6, and 7, and measuring the V
TT
performance using the test setup as described in Figure 8,
the FAN6555 delivered a V
TT
20mV for 1A to 2A loads
(see Figure 9). Table 1 provides a recommended parts list.
An alternate application circuit for the FAN6555 is shown in
Figure 2. The number of external components is reduced
compared to the circuit in Figure 1. This is achieved by
replacing four, 0.1F bypass capacitors with one, low ESR,
10F ceramic capacitor placed right next to U1. Two 100
resistors are also eliminated. High value, surface-mount
MLC capacitors were not available when the original appli-
cation circuit (Figure 1) was developed. Both application
circuits offer the same electrical performance but the circuit
shown in Figure 2 has a reduced bill-of-materials. Table 2
shows the recommended parts list for the circuit of Figure 2.
Bus Termination Solutions for Others Buses
Table 3 provides a summary of various bus termination V
REF
& V
TT
requirements. The FAN6555 can be used for those
applications.
Figure 2. Alternate Application Circuit
16
15
14
13
12
11
10
9
U1
FAN6555
VDD
PVDD1
VL1
PGND1
PGND2
VL2
PVDD2
DGND
AVCC
VCCQ
VREFOUT
AGND
SHDN
VREFIN
VFB
VDD
1
2
3
4
5
6
7
8
R3
100k
VCCQ
VREFOUT
VTT
2.5V TO 4V
SHDN
VREFIN
GND
GND
TO SDRAMS
C4 1nF
C5
470
F
R1 100k
R2 1k
C2
0.1
F
C1
820
F
F2V
OS-CON
L1 3.3
H
C3 10
F
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FAN6555
PRODUCT SPECIFICATION
6
REV. 1.1.3 8/4/03
Figure 3. Complete Termination Solution PC Main Memory (PC Motherboard)
Figure 4. Complete Termination Solution Graphics Memory Bus AGP Graphics Cards
DATA LINE, CLOCK LINES,
ADDRESS LINES, CONTROL LINES
TERMINATION
RESISTORS
FAN6555
PC CHIP SET
NORTHBRIDGE
TERMINATION
RESISTORS
VTT
VREF
168/184/208-PIN DIMM CONNECTORS
AND SDRAM/SGRAM MODULES
DATA LINE, CLOCK LINES,
ADDRESS LINES, CONTROL LINES
TERMINATION
RESISTORS
3D
GRAPHIC CHIP
TERMINATION
RESISTORS
SO DIMM
AND MODULES
SGRAM
FAN6555
VOLTAGE
REGULATOR
2.5V
VREF
VTT
5V OR 3.3V
AGP/PCI BUS
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PRODUCT SPECIFICATION
FAN6555
REV. 1.1.3 8/4/03
7
Figure 5. Top Silk
Figure 6. Top Layer
Figure 7. Bottom Layer
16
15
14
13
12
11
10
9
U1
FAN6555
VDD
PVDD1
VL1
PGND1
PGND2
VL2
PVDD2
DGND
AVCC
VCCQ
VREFOUT
AGND
SHDN
VREFIN
VFB
VDD
1
2
3
4
5
6
7
8
R3
100k
VCCQ
VREFOUT
TPI
VTT
2.5V TO 4V
SHDN
VREFIN
GND
GND
TO SDRAMS
C7 1nF
C5
470
F
C4 0.1
F
R4 100k
R5 1k
C9 0.1
F
R2 100
R1 100
C8 0.1
F
C2
0.1
F
C1
820
F
F2V
OS-CON
L1 3.3
H C3 0.1F
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FAN6555
PRODUCT SPECIFICATION
8
REV. 1.1.3 8/4/03
Figure 8. Test Circuit Setup
Figure 9. VTT Performance for DDR Bus
3.3V POWER
SUPPLY
ACTIVE
CLAMP
VDD
CURRENT SOURCE/SINK
POWER SUPPLY
VTT
GND
VCCQ
V
A
VCCQ
SUPPLY
V
A
FAN6555
EVAL
ITT
2A SOURCING
1A SOURCING
VTT VARIANCE WITH VDD@ITT (VCCQ 2.5V)
TESTED WITH EVAL PCB
ITT
2A SINKING
1A SINKING
0A SINKING
1.29
1.28
1.27
1.26
V
TT
(V)
VDD (V)
2.0
2.5
3.0
4.0
3.5
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PRODUCT SPECIFICATION
FAN6555
REV. 1.1.3 8/4/03
9
Table 1. Recommend Parts List for Figure 1.
Table 2. Recommend Parts List for Figure 2.
Item
Qty
Description
Manufacturer / Part Number
Designator
Resistors
1
2
100
1210 SMD
Panasonic/ERJ-8ENF1000V
R1, R2
2
1
1k
1210 SMD
Panasonic/ERJ-8ENF1001V
R5
3
2
100k
1210 SMD
Panasonic/ERJ-8ENF1003V
R3, R4
Capacitors
4
3
0.1F 1210 Film SMD
Panasonic/ECV3VB1E104K
Panasonic/ECU-V1H104KBW
C2, C8, C9
5
1
820F 2V Solid Elect. SMD
Sanyo/2SV820M Os Con
C1
6
1
470F 6.3V Solid Elect. SMD
Sanyo/6SVP470M Os Con
C5
7
1
1nF 1210 Film SMD
Panasonic/ECU-V1H102KBM
C7
8
2
0.1F 0805 Film
Panasonic/ECJ-2VF1C104Z
C3, C4
ICs
9
1
FAN6555 Bus Terminator
FAN6555M
U1
Magnetics
10
1
3.3H 5A inductor SMD
Coilcraft/D03316P-332HC
Pulse Eng./ P0751.332T
Gowanda/SMP3316-331M
XFMRS inc./XF0046-S4
L1
Other
11
1
Scope probe socket
Tektronics/131-4353-00
TP1
12
1
12 Pin breakaway strip
Sullins/PTC36SAAN (36 PINS)
I/O, standoffs
Item
Qty
Description
Manufacturer / Part Number
Designator
Resistors
1
2
100k
0805 SMD
Panasonic/ERJ-8ENF1000V
R1, R3
2
1
1k
0805 SMD
Panasonic/ERJ-8ENF1000V
R2
Capacitors
3
1
0.1F, 1210 Film SMD
Panasonic/ECV3VB1E104K
Panasonic/ECU-V1H104KBW
C2
4
1
820F 2V Solid Elect. SMD
Sanyo/2SV820M Os Con
C1
5
1
470F 6.3V Solid Elect. SMD
Sanyo/6SVP470M Os Con
C5
6
1
1nF 1210 Film SMD
Panasonic/ECU-V1H102KBM
C4
7
1
10F 6.3V Ceramic
TDK/C2012X5R0J106M
C3
ICS
8
1
FAN6555 Bus Terminator
FAN6555M
U1
Magnetics
9
1
3.3H 5A inductor SMD
Coilcraft/D03316P-332HC
Pulse Eng./ P0751.332T
Gowanda/SMP3316-331M
XFMRS inc./XF0046-S4
L1
Other
10
1
Scope probe socket
Tektronics/131-4353-00
TP1
11
1
12 Pin breakaway strip
Sullins/PTC36SAAN (36 PINS)
I/O, standoffs
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FAN6555
PRODUCT SPECIFICATION
10
REV. 1.1.3 8/4/03
Vendor List
1. AVX
(207) 282-5111
2.
Sanyo
(619) 661-6835
3.
Tektronix
(408) 496-0800
4.
Coilcraft
(847) 639-6400
5.
Pulse
(800) 797-8573
6.
Gowanda
(716) 532-2234
7.
Xfmrs Inc.
(317) 834-1066
8.
Panasonic
(714) 373-7366
9.
Digikey
(800) 344-4539
Table 3. Termination Solutions Summary By Bus Type
Bus
Description
Driving
Method
VDDQ VTT
V
REF
Fairchild
Solutions
Industry
System
Components
GTL+
Gunning
Transceiver
Bus Plus
Open Drain
3.3V
1.5V10%
1.0V2%
FAN6555;
Mode: V
REF
Input = 1.5V,
V
CC
= 3.3V
300 to 500MHz
Processor;
PC Chipsets;
GTLP 16xxx
Buffers;
Fairchild,
Texas Instr.
DDR
(SSTL-2)
Series Stub
Terminated
Logic for 2V
Symmetric
Drive,
Series
Resistance
2.5V10%
0.5x
(V
DDQ
)
3%
2.5V
FAN6555,
ML6554CU,
or ML6553CS;
Mode: V
REF
Input = Floating
or Forced,
V
CC
= 3.3V
DDR SDRAM;
Hitachi,
Fujitsu,
NEC, Micro,
Mitsubishi
RAMBUS
RAMBUS
Signaling
Logic
Open Drain
None
Specified
2.5V
2.0V
ML6553CS;
Mode: V
REF
Input = Open,
V
CC
= V
DDQ
nDRAM,
RAMBUS,
Intel, Toshiba
LV-TTL
Low Voltage
TTL Logic or
PECL or
3.3V VME
Symmetric
Drive
3.310%
V
DDQ
/2
3.3V
ML6553CS;
Mode: V
REF
Input = Open,
VCC = VDDQ
Processors or
backplanes;
LV-TTL
SDRAM,
EDO RAM
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PRODUCT SPECIFICATION
FAN6555
REV. 1.1.3 8/4/03
11
Mechanical Dimensions
Inches (Millimeters)
Package: M16 16-Pin SOIC
16
9
1
8
D
A
A1
C
ccc C
LEAD COPLANARITY
SEATING
PLANE
e
B
L
h x 45
C
E
H
A
.053
.069
1.35
1.75
Symbol
Inches
Min.
Max.
Min.
Max.
Millimeters
Notes
A1
.004
.010
0.10
0.25
.020
0.51
B
.013
0.33
C
.0075
.010
0.19
0.25
E
.150
.158
3.81
4.00
e
.228
.244
5.80
6.20
.010
.020
0.25
0.50
H
.050 BSC
1.27 BSC
h
L
.016
.050
0.40
1.27
0
8
0
8
3
6
5
2
2
N
16
16

ccc
.004
0.10
--
--
D
.386
.394
9.80
10.00
Notes:
1.
2.
3.
4.
5.
6.
Dimensioning and tolerancing per ANSI Y14.5M-1982.
"D" and "E" do not include mold flash. Mold flash or
protrusions shall not exceed .010 inch (0.25mm).
"L" is the length of terminal for soldering to a substrate.
Terminal numbers are shown for reference only.
"C" dimension does not include solder finish thickness.
Symbol "N" is the maximum number of terminals.
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FAN6555
PRODUCT SPECIFICATION
8/4/03 0.0m 002
Stock#DS30006555
2003 Fairchild Semiconductor Corporation
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
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