www.fairchildsemi.com
REV. 1.0.3 9/11/00
Features
60 MHz computation rate
60 MHz data and coefficient input
Four 11 x 10-bit multipliers
Individual data and coefficient inputs
25-Bit accumulator
Fractional and integer two's complement data formats
Input and output data latches with user-configurable
enables
Selectable 16-bit rounded output
Internal 1/2 LSB rounding
Available in 120-pin CPGA, PPGA, MPGA, or MQFP
Applications
Fast pixel interpolation
Fast image manipulation
Image mixing and keying
High-performance FIR filters
Adaptive digital filters
One- and two-dimensional image processing
Description
The TMC2246A is a video-speed convolutional array com-
posed of four 11 x 10 bit registered multipliers followed by a
summer and an accumulator. All eight multiplier inputs are
accessible to the user and may be updated every clock cycle
with integer or fractional two's complement data. A pipe-
lined architecture, fully registered input and output ports,
and asynchronous three-state output enable control simplify
the design of complex systems.
The data or coefficient inputs to the multipliers may be held
over multiple clock cycles, providing storage for mixing and
filtering coefficients. The 25-bit internal accumulator path
allows two bits of cumulative word growth and may be inter-
nally rounded to 16 bits. Output data are updated every clock
cycle, or may be held under user control. All data inputs, out-
puts, and controls are TTL compatible and (except for the
three-state output enable) are registered on the rising edge of
CLK.
The TMC2246A is uniquely suited to performing pixel inter-
polation in image manipulation and filtering applications. As
a companion to the Fairchild Semiconductor TMC2301 and
TMC2302 Image Manipulation Sequencers, the TMC2246A
can execute a bilinear interpolation of an image (4-pixel ker-
nels) at real-time video rates. Larger kernels or other, more
complex, functions can be realized with no loss in performance
by utilizing multiple devices.
With unrestricted access to all data and coefficient input
ports, the TMC2246A offers considerable flexibility in appli-
cations performing digital filtering, adaptive FIR filters, mix-
ers, and other similar systems requiring high-speed
processing.
Fabricated in a submicron CMOS process, the TMC2246A
operates at a guaranteed clock rate of 60 MHz over the full
temperature and supply voltage ranges. It is pin- and func-
tion-compatible with Fairchild's TMC2246, while providing
higher speed operation and lower power dissipation. It is
available in a 120 pin Plastic Pin Grid Array (PPGA), 120
pin Ceramic Pin Grid Array (CPGA), 120 lead MQFP to
PPGA (MPGA), and a 120 lead Metric Quad FlatPack
(MQFP).
Logic Symbol
D1
9-0
D2
9-0
D3
9-0
D4
9-0
ENB1-4
ENSEL
ACC
FSEL
OCEN
OEN
CLK
TMC2246A
Image Filter
C1
10-0
C2
10-0
C3
10-0
C4
10-0
S
15-0
TMC2246A
Image Filter
11 x 10 bit, 60 MHz
TMC2246A
PRODUCT SPECIFICATION
REV. 1.0.3 9/11/00
3
Pin Assignments
120 Pin Plastic Pin Grid Array, H5 Package, 120 Pin Ceramic Pin Grid Array, G1 Package, and
120 Pin Metric Quad FlatPack to 120 Pin Plastic Pin Array, H6 Package
B
A
D
E
F
G
H
J
K
L
M
N
C
1
2
3
4
5
6
7
8
9
10 11 12 13
ENSEL
ENB2
ENB3
D47
D45
D42
D41
C410
C48
C46
C43
C40
C32
ACC
FSEL
ENB4
D49
D46
D43
D40
C49
C47
C44
C42
C30
C35
S15
OEN
CLK
ENB1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
C1
C2
C3
C4
D48
D44
GND
VDD
C45
C41
C31
C33
C36
S13
S14
OCEN
C34
C37
C39
S11
S12
GND
C38
C310
D30
S9
S10
VDD
D31
D32
D33
S7
S8
GND
C5
C6
C7
C8
C9
C10
C11
C12
C13
D1
D2
D3
D11
D12
D13
E1
E2
E3
E11
E12
E13
F1
F2
F3
F11
F12
F13
G1
G2
G3
Pin
Name
Pin
Name
D35
D36
D34
S6
S5
VDD
GND
D38
D37
S4
S3
GND
D27
D29
D39
S2
S1
D18
D23
D26
D28
S0
D17
D15
D12
C19
GND
VDD
C20
C24
G11
G12
G13
H1
H2
H3
H11
H12
H13
J1
J2
J3
J11
J12
J13
K1
K2
K3
K11
K12
K13
L1
L2
L3
L4
L5
L6
L7
L8
L9
C28
D20
D24
D25
D19
D14
D11
C110
C17
C15
C13
C10
C22
C25
C29
D21
D22
D16
D13
D10
C18
C16
C14
C12
C11
C21
C23
C26
C27
C210
L10
L11
L12
L13
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
M12
M13
N1
N2
N3
N4
N5
N6
N7
N8
N9
N10
N11
N12
N13
Pin
Name
Pin
Name
Top View
Cavity Up
KEY
TMC2246A
PRODUCT SPECIFICATION
REV. 1.0.3 9/11/00
5
Pin Descriptions
Pin Name
Pin Number
Pin Function Description
CPGA/PPGA/
MPGA
MQFP
Power
V
DD
F3, H3, L7, C8
12, 20, 46, 102
Supply Voltage.
The TMC2246A operates from a single +5V
supply. All power and ground pins must be connected.
GND
E3, G3, J3, L6,
H11, C7
8, 16, 24, 42,
72, 106
Ground.
The TMC2246A operates from a single +5V supply. All
power and ground pins must be connected.
Clock
CLK
C3
1
System Clock.
The TMC2246A operates from a single master
clock input. The rising edge of clock strobes all enabled registers.
All timing specifications are referenced to the rising edge of CLK.
Inputs
D1
9-0
M1, K3, L2, N1,
L3, M2, N2, L4,
M3, N3
27, 28, 29, 30,
31, 32, 33, 34,
35, 36
Data Input Ports.
D1 through D4 are the 10-bit data input ports.
The LSB is Dx
0
.
D2
9-0
J12, K13, J11,
K12, L13, L12,
K11, M13, M12,
L11
70, 69, 68, 67,
66, 65, 64, 63,
62, 61
D3
9-0
J13, H12, H13,
G12, G11, G13,
F13, F12, F11,
E13
71, 73, 74, 75,
76, 77, 78, 79,
80, 81
D4
9-0
B4, C5, A4, B5,
A5, C6, B6, A6,
A7, B7
115, 114, 113,
112, 111, 110,
109, 108, 107,
105
C1
10-0
M4, L5, N4, M5,
N5, M6, N6, M7,
N7, N8, M8
37, 38, 39, 40,
41, 43, 44, 45,
47, 48, 49
Coefficient Input Ports.
C1 through C4 are the 11-bit coefficient
input ports. The LSB is Cx
0
.
C2
10-0
N13, M11, L10,
N12, N11, M10,
L9, N10, M9,
N9, L8
60, 59, 58, 57,
56, 55, 54, 53,
52, 51, 50
C3
10-0
E12, D13, E11,
D12, C13, B13,
D11, C12, A13,
C11, B12
82, 83, 84, 85,
86, 87, 88, 89,
90, 91, 92
C4
10-0
A8, B8, A9, B9,
A10, C9, B10,
A11, B11, C10,
A12
104, 103, 101,
100, 99, 98, 97,
96, 95, 94, 93
Outputs
S
15-0
C1, D2, D1, E2,
E1, F2, F1, G2,
G1, H1, H2, J1,
J2, K1, K2, L1
6, 7, 9, 10, 11,
13, 14, 15, 17,
18, 19, 21, 22,
23, 25, 26
Sum Output.
The current 16-bit result is available at the Sum
output. The LSB is S
0
. See the Functional Block Diagram
.
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