LP3000
2
W
P
OWER
PHEMT
Phone:
(408) 988-1845
http://
www.filss.com
Revised:
1/18/01
Fax:
(408) 970-9950
Email:
sales@filss.com
FEATURES
33.5 dBm Output Power
at 1-dB Compression at 18 GHz
7 dB Power Gain at 18 GHz
30.5 dBm Output Power
at 1-dB Compression at 3.3V
45% Power-Added Efficiency
DESCRIPTION AND APPLICATIONS
The LP3000 is an Aluminum Gallium Arsenide / Indium Gallium Arsenide (AlGaAs/InGaAs)
Pseudomorphic High Electron Mobility Transistor (PHEMT), utilizing an Electron-Beam direct-
write 0.25
m by 3000
m Schottky barrier gate. The recessed "mushroom" gate structure
minimizes parasitic gate-source and gate resistances. The epitaxial structure and processing have
been optimized for reliable high-power applications. The LP3000 is also available in a P100 flanged
ceramic package and in the low cost plastic SOT89 package.
Typical applications include commercial and other high-performance power amplifiers.
ELECTRICAL SPECIFICATIONS @ T
Ambient
= 25C
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
Saturated Drain-Source Current
I
DSS
V
DS
= 2 V; V
GS
= 0 V
800
1060
1100
mA
Power at 1-dB Compression
P-1dB
V
DS
= 8 V; I
DS
= 50% I
DSS
33
33.5
dBm
Power Gain at 1-dB Compression
G-1dB
V
DS
= 8 V; I
DS
= 50% I
DSS
4
6
dB
Power-Added Efficiency
PAE
V
DS
= 8 V; I
DS
= 50% I
DSS
45
%
Maximum Drain-Source Current
I
MAX
V
DS
= 2 V; V
GS
= 1 V
1700
mA
Transconductance
G
M
V
DS
= 2 V; V
GS
= 0 V
725
900
mS
Gate-Source Leakage Current
I
GSO
V
GS
= -5 V
15
125
A
Pinch-Off Voltage
V
P
V
DS
= 2 V; I
DS
= 10 mA
-0.25
-1.2
-2.0
V
Gate-Source Breakdown
Voltage Magnitude
|V
BDGS
|
I
GS
= 15 mA
-12
-15
V
Gate-Drain Breakdown
Voltage Magnitude
|V
BDGD
|
I
GD
= 15 mA
-12
-16
V
Thermal Resistivity
JC
20
C/W
frequency=18 GHz
DRAIN
BOND
PAD (4X)
SOURCE
BOND
PAD (2x)
GATE
BOND
PAD (4X)
DIE SIZE: 28.3X16.5 mils (720x420
m)
DIE THICKNESS: 2.6 mils (65
m)
BONDING PADS: 1.9X2.4 mils (50x60
m)
LP3000
2
W
P
OWER
PHEMT
Phone:
(408) 988-1845
http://
www.filss.com
Revised:
1/18/01
Fax:
(408) 970-9950
Email:
sales@filss.com
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Test Conditions
Min
Max
Units
Drain-Source Voltage
V
DS
T
Ambient
= 22
3
C
12
V
Gate-Source Voltage
V
GS
T
Ambient
= 22
3
C
-5
V
Drain-Source Current
I
DS
T
Ambient
= 22
3
C
2xI
DSS
mA
Gate Current
I
G
T
Ambient
= 22
3
C
30
mA
RF Input Power
P
IN
T
Ambient
= 22
3
C
1.2
W
Channel Operating Temperature
T
CH
T
Ambient
= 22
3
C
175
C
Storage Temperature
T
STG
--
-65
175
C
Total Power Dissipation
P
TOT
T
Ambient
= 22
3
C
6.0
W
Notes:
Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
Power Dissipation defined as: P
TOT
(P
DC
+ P
IN
) P
OUT
, where
P
DC
: DC Bias Power
P
IN
: RF Input Power
P
OUT
: RF Output Power
Absolute Maximum Power Dissipation to be de-rated as follows above 25
C:
P
TOT
= 6.0W (0.040W/
C) x T
HS
where T
HS
= heatsink or ambient temperature.
HANDLING PRECAUTIONS
To avoid damage to the devices care should be exercised during handling. Proper Electrostatic
Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and
testing. These devices should be treated as Class 1A (0-500 V). Further information on ESD control
measures can be found in MIL-STD-1686 and MIL-HDBK-263.
ASSEMBLY INSTRUCTIONS
The recommended die attach is gold/tin eutectic solder under a nitrogen atmosphere. Stage
temperature should be 280-290
C; maximum time at temperature is one minute. The recommended
wire bond method is thermo-compression wedge bonding with 0.7 or 1.0 mil (0.018 or 0.025 mm)
gold wire. Stage temperature should be 250-260
C.
APPLICATIONS NOTES & DESIGN DATA
Applications Notes are available from your local Filtronic Sales Representative or directly from the
factory. Complete design data, including S-parameters, noise data, and large-signal models are
available on the Filtronic web site.
All information and specifications are subject to change without notice.
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