Motorola reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Motorola
does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license
under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems
intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the
failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola
products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees,
subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of,
directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges
that Motorola was negligent regarding the design or manufacture of the part.
DOCUMENT NUMBER
S12TIM16B4CV1/D
1
TIM_16B4C
Block Guide
V1.0
Original Release Date: 09 Nov 2001
Revised: 07 Dec 2001
8/16 Bit Division, TSPG, Austin
Motorola, Inc
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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Block Guide -- S12TIM16B4CV1 V1.0
3
Section 1 Introduction
1.1
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.2
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.4
Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Section 2 Signal Description
2.1
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2
Detailed Signal Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2.1
IOC7 Input capture and Output compare channel 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2.2
IOC6 Input capture and Output compare channel 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2.3
IOC5 Input capture and Output compare channel 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2.4
IOC4 Input capture and Output compare channel 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Section 3 Memory Map and Registers
3.1
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2
Module Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3
Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3.1
Timer Input Capture/Output Compare Select (TIOS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3.2
Timer Compare Force Register (CFORC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.3.3
Output Compare 7 Mask Register (OC7M) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.3.4
Output Compare 7 Data Register (OC7D) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3.5
Timer Count Register (TCNT). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3.6
Timer System Control Register 1 (TSCR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.3.7
Timer Toggle On Overflow Register 1 (TTOV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.3.8
Timer Control Register 1 (TCTL1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.9
Timer Control Register 3 (TCTL3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3.10
Timer Interrupt Enable Register (TIE). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3.11
Timer System Control Register 2 (TSCR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3.12
Main Timer Interrupt Flag 1 (TFLG1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3.13
Main Timer Interrupt Flag 2 (TFLG2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.3.14
Timer Input Capture/Output Compare Registers (TC4 - TC7) . . . . . . . . . . . . . . . . . . . . . . . . 21
3.3.15
16-Bit Pulse Accumulator Control Register (PACTL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.3.16
Pulse Accumulator Flag Register (PAFLG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3.17
Pulse Accumulators Count Registers (PACNT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.3.18
Timer Test Register (TIMTST) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
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Freescale Semiconductor, Inc.
For More Information On This Product,
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Block Guide -- S12TIM16B4CV1 V1.0
4
Section 4 Functional Description
4.1
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.2
Prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.3
Input Capture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.4
Output Compare . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.5
Pulse Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.5.1
Event Counter Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.5.2
Gated Time Accumulation Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Section 5 Resets
5.1
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Section 6 Interrupts
6.1
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.2
Description of Interrupt Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.2.1
Channel [7:4] Interrupt. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.2.2
Pulse Accumulator Input Interrupt. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.2.3
Pulse Accumulator Overflow Interrupt . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.2.4
Timer Overflow Interrupt (TOF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
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Freescale Semiconductor, Inc.
For More Information On This Product,
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