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Genesis Microchip Publication
Preliminary Data Sheet
gm6010
Publication number: C6010-DAT-01B
Publication date: August 2002
gm6010 Preliminary Data Sheet
August 2002
C6010-DAT-01B
Document History:
Revision Description Date
C6010-DAT-01A
Initial Release
March 2002
C6010-DAT-01B Editorial
August
2002
Related Documents:
Doc Number
Title
Date
C6010-DSR-01
gm6010 / 6015 Programming Guide
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Copyright 2002 Genesis Microchip Inc. All Rights Reserved.
Genesis Microchip Inc. reserves the right to change or modify the information contained herein without
notice. It is the customer's responsibility to obtain the most recent revision of the document. Genesis
Microchip Inc. makes no warranty for the use of its products and bears no responsibility for any errors or
omissions that may appear in this document.
gm6010 Preliminary Data She
et
August 2002
C6010-DAT-01B
iii
Table of Contents
1.
OVERVIEW .................................................................................................................................. 1
1.1
Applications .......................................................................................................................... 1
1.2
System Design Example ....................................................................................................... 1
1.3
gm6010 Features ................................................................................................................... 2
2.
PINOUT DIAGRAM..................................................................................................................... 5
3.
PIN DESCRIPTION ...................................................................................................................... 6
4.
FUNCTIONAL DESCRIPTION ................................................................................................. 12
4.1
Reset.................................................................................................................................... 13
4.1.1
Hardware Reset............................................................................................................... 13
4.1.2
Software Reset ................................................................................................................ 13
4.2
Bootstrap Configuration...................................................................................................... 13
4.3
Clock Generation and Distribution ..................................................................................... 14
4.3.1
External Crystal / Oscillator............................................................................................ 14
4.3.2
PLL / DDS ...................................................................................................................... 14
4.3.3
Clock Domains ............................................................................................................... 16
4.4
Input Interface ..................................................................................................................... 17
4.4.1
Input Port Selection......................................................................................................... 17
4.4.2
Input Signals ................................................................................................................... 18
4.4.3
Input Video Format......................................................................................................... 20
4.4.4
Input Sync Processing..................................................................................................... 22
4.4.5
Input Capture Window.................................................................................................... 23
4.4.6
Input Format Measurement............................................................................................. 24
4.4.7
Wide Screen Signal (WSS) decoding ............................................................................. 25
4.5
Output Interface .................................................................................................................. 25
4.5.1
Output Signals................................................................................................................. 26
4.5.2
VBI Data Insertion.......................................................................................................... 27
4.5.3
Output Video Format ...................................................................................................... 27
4.5.4
Video Look Up Table ..................................................................................................... 28
4.5.5
Dithering ......................................................................................................................... 29
4.5.6
Triple 10-bit DAC........................................................................................................... 29
4.5.7
Output Configuration ...................................................................................................... 30
4.6
Color Space Conversion (CSC) .......................................................................................... 33
4.6.1
Input CSC ....................................................................................................................... 33
4.6.2
Output CSC..................................................................................................................... 33
4.6.3
Color Control .................................................................................................................. 33
4.7
Video Processing................................................................................................................. 34
gm6010 Preliminary Data She
et
August 2002
C6010-DAT-01B
iv
4.7.1
MAIN Channel................................................................................................................ 34
4.7.2
PIP Channel ................................................................................................................... 38
4.7.3
Video Processing Bypass................................................................................................ 38
4.8
Synchronization Modes....................................................................................................... 39
4.9
Frame Store Interface.......................................................................................................... 39
4.10
Interrupt............................................................................................................................... 40
4.11
GPIO Pins ........................................................................................................................... 40
4.12
Host Interface...................................................................................................................... 40
4.12.1
2-wire mode .................................................................................................................... 41
4.12.2
3-wire mode .................................................................................................................... 44
5.
System Layout Guideline............................................................................................................. 46
5.1
Power / Ground ................................................................................................................... 46
5.2
Signals................................................................................................................................. 46
6.
MECHANICAL SPECIFICATION ............................................................................................ 48
gm6010 Preliminary Data She
et
August 2002
C6010-DAT-01B
v
List of Figures
Figure 1.
gm6010 System Design Example ............................................................................... 2
Figure 2.
gm6010 Pinout Diagram............................................................................................. 5
Figure 3.
gm6010 Functional Block Diagram.......................................................................... 12
Figure 4.
Using crystal ............................................................................................................. 14
Figure 5.
Using oscillator......................................................................................................... 14
Figure 6.
Clock Generation and Distribution ........................................................................... 15
Figure 7.
Clock Domains ......................................................................................................... 16
Figure 8.
ITU-BT-656.............................................................................................................. 21
Figure 9.
8-bit 4:2:2 YCbCr ..................................................................................................... 21
Figure 10.
16-bit 4:2:2 YCbCr ................................................................................................... 21
Figure 11.
24-bit 4:4:4 YCbCr data ........................................................................................... 21
Figure 12.
24-bit RGB data........................................................................................................ 22
Figure 13.
Embedded Sync Extraction....................................................................................... 22
Figure 14.
Input Capture Window (HREF/DE enabled)............................................................ 24
Figure 15.
Input Capture Window (HREF/DE disabled)........................................................... 24
Figure 16.
Relationship between DHS_CS and DSYNCT ........................................................ 27
Figure 17.
Gamma correction..................................................................................................... 28
Figure 18.
8-bit to 10-bit mapping ............................................................................................. 29
Figure 19.
10-bit to 6-bit dithering............................................................................................. 29
Figure 20.
Output Display Windows.......................................................................................... 31
Figure 21.
Examples of Different PIP Configurations............................................................... 32
Figure 22.
4:3 to 16:9 aspect ratio conversion ........................................................................... 35
Figure 23.
16:9 to 4:3 aspect ratio conversion ........................................................................... 36
Figure 24.
Inverse 3:2 pulldown processing .............................................................................. 37
Figure 25.
2-wire protocol.......................................................................................................... 42
Figure 26.
10-bit Register Address ............................................................................................ 43
Figure 27.
3-wire protocol.......................................................................................................... 45
Figure 28.
Typical SOY_G +/- connection ................................................................................ 46
Figure 29.
gm6010 208 pin PQFP dimension ............................................................................ 48
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