NOT RECOMMENDED
FOR NEW DESIGNS
GENLINX
TM
GS9015B
Serial Digital Reclocker
DATA SHEET
Revision Date: July 2004
FEATURES
DEVICE DESCRIPTION
The GS9015B is a monolithic IC designed to receive SMPTE
259M serial digital video signals. This device performs the
function of data and clock recovery. It interfaces directly with
the
GENLINX
TM
GS9000B or GS9000S Decoder.
While there are no plans to discontinue the GS9015B, Gennum
has developed a successor product with improved features
and performance called the GS9035. The GS9035 is
recommended for new designs.
The VCO centre frequencies are controlled by external resistors
which can be selected by applying a two bit binary code to the
Standards Select input pins. Alternatively, the GS9015B can
be used with the GS9010A to form an adjustment free reclocker
system.
The GS9015B is packaged in a 28 pin PLCC operating from
a single +5 or -5 volt supply.
reclocking of SMPTE 259M signals
operational to 400 Mb/s
adjustment free reclocker when used with the
GS9000B or GS9000S decoder and GS9010A
Automatic Tuning Sub-system
28 pin PLCC packaging
Pb-free and Green
APPLICATIONS
4
SC
, 4:2:2 and 360 Mb/s serial digital interfaces
SPECIAL NOTE: R
VCO1
and R
VCO2
are functional over a
reduced temperature range of T
A
=0C to 50C. R
VCO0
and R
VCO3
are functional over the full temperature range
of T
A
=0C to 70C. This limitation does not affect
operation with the GS9010A ATS.
FUNCTIONAL BLOCK DIAGRAM
Document No. 32467 - 0
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 tel. +1 (905) 632-2996 fax. +1 (905) 632-5946
Web Site: www.gennum.com E-mail: info@gennum.com
Part Number
Package
Temperature
Pb-Free
and Green
GS9015BCPJ
28 Pin PLCC
0C to 70C
No
GS9015BCTJ
23 Pin PLCC Tape
0C to 70C
No
GS90015BCPJE3
28 Pin PLCC
0C to 70C
Yes
ORDERING INFORMATION
SERIAL DATA
PLL
SERIAL CLOCK
LOOP
FILTER
SS0
SS1
CARRIER
DETECT
DATA
LATCH
PHASE
COMPARATOR
CARRIER
DETECT
CHARGE
PUMP
STANDARD
SELECT
VCO
19
12
13 14 15 17
20
21
SERIAL DATA
SERIAL CLOCK
24
25
22
23
2
/2
10
DIGITAL
IN
5,6
GS9015B
2 of 13
NOT RECOMMENDED
FOR NEW DESIGNS
32467 - 0
ABSOLUTE MAXIMUM RATINGS
PARAMETER
VALUE/UNITS
Supply Voltage
5.5 V
Input Voltage Range (any input)
V
CC
+0.5 to V
EE
-0.5 V
DC Input Current (any one input)
5 mA
Power Dissipation
750 mW
Operating Temperature Range
0C
T
A
70C
Storage Temperature Range
-65C
T
S
150C
Lead Temperature (soldering, 10 seconds)
260C
PARAMETER SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS NOTES
Supply Voltage
V
S
Operating Range
4.75
5.0
5.25
V
Power Consumption
P
D
-
330
500
mW
Supply Current (Total)
I
S
-
87
120
mA see Figure11
Serial Data & - High
V
OH
T
A
= 25C
-1.025
-
-0.88
V with respect to V
CC
Clock Output - Low
V
OL
T
A
= 25C
-1.9
-
-1.6
V
Logic Inputs - High
V
IH MIN
+2.0
-
-
V with respect to V
EE
- Low
V
IL MAX
-
-
+0.8
V with respect to V
EE
Carrier Detect
V
CDL
R
L
= 10 k
to V
CC
0.2
0.4
V
Output Voltage
V
CDH
4.0
5.0
-
V
Serial Data Bit Rate
BR
SDO
T
A
= 25C
100
-
400
Mb/s
Serial Clock Frequency
SLK
T
A
= 25C
100
-
400
MHz see Figure 9
Output Signal Swing
V
O
T
A
= 25C
700
800
900
mV p-p see Figure10
Serial Data to Serial Clock
t
d
See Waveforms
-
-500
-
ps Data lags Clock
Lock Times
t
LOCK
see note 1
-
-
10
s
Jitter
t
J
T
A
= 25C, 270 Mb/s
-
100
-
ps p-p see Figure12
Direct Digital Input
V
DDI
200
-
2000
mVp-p Differential Drive
Levels (5, 6)
V
S
= 5V, T
A
= 0C to 70C, R
L
= 100
to (V
CC
- 2V) unless otherwise shown.
(1, 10, 20, 21)
GS9015B RECLOCKER DC ELECTRICAL CHARACTERISTICS
with respect to V
CC
with respect to
V
EE
Open
Collector - Active High
PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NOTES
Synchronization
V
S
= 5V, T
A
= 0C to 70C, R
L
= 100
to (V
CC
- 2V) unless otherwise shown.
GS9015B RECLOCKER AC ELECTRICAL CHARACTERISTICS
NOTES: 1.
Switching between two sources of the same data rate.
CAUTION
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT OPEN PACKAGES OR HANDLE
EXCEPT AT A STATIC-FREE WORKSTATION
3 of 13
32467 - 0
NOT RECOMMENDED
FOR NEW DESIGNS
The GS9015B Reclocking Receiver is a bipolar integrated
circuit containing circuitry necessary to re-clock and
regenerate the NRZI serial data stream.
Packaged in a 28 pin PLCC, the receiver operates from a
single five volt supply at data rates to 400 Mb/s. Typical power
consumption is 330 mW. Typical output jitter is 100 ps
at 270 Mb/s.
Serial Digital signals are applied to digital inputs DDI and DDI
(pins 5,6).
tD
SERIAL
DATA OUT
(SD0)
50%
SERIAL
CLOCK OUT
(SCK)
tD
50%
Phase Locked Loop
The phase comparator itself compares the position of
transitions in the incoming signal with the phase of the local
oscillator (VCO). The error-correcting output signals are fed
to the charge pump in the form of short pulses. The charge
pump converts these pulses into a "charge packet" which is
accurately proportional to the system phase error.
The charge packet is then integrated by the second-order
loop filter to produce a control voltage for the VCO.
During periods when there are no transitions in the signal, the
loop filter voltage is required to hold precisely at its last value
so that the VCO does not drift significantly between corrections.
Commutating diodes in the charge pump keep the output
leakage current extremely low, minimizing VCO frequency
drift.
The VCO is implemented using a current-controlled
multivibrator, designed to deliver good stability, low phase
noise and wide operating frequency capability. The frequency
range is design-limited to 10% about the oscillator centre
frequency.
Fig.1 Waveforms
VCO Centre Frequency Selection
The centre frequency of the VCO is set by one of four external
current reference resistors (RVCO0-RVCO3) connected to
pins 13,14,15 or 17. These are selected by two logic inputs
SS0 and SS1 (pins 20, 21) through a 2:4 decoder according
to the following truth table.
SS1
SS0 Resistor Selected
0
0
RVCO0 (13)
0
1
RVCO1 (14)
1
0
RVCO2 (15)
1
1
RVCO3 (17)
As an alternative, the GS9010A Automatic Tuning Sub-system
and the GS9000B or GS9000S Decoder may be used in
conjunction with the GS9015B to obtain adjustment free and
automatic standard select operation (see Figure17).
With the VCO operating at twice the clock frequency, a clock
phase which is centred on the eye of the locked signal is used
to latch the incoming data, thus maximising immunity to
jitter-induced errors. The alternate phase is used to latch the
output re-clocked data SDO and SDO (pins 25, 24). The true
and inverse clock signals themselves are available from the
SCO and SCO pins 23 and 22.
GS9015B Reclocking Receiver - Detailed Device Description
4 of 13
NOT RECOMMENDED
FOR NEW DESIGNS
32467 - 0
GS9015B PIN DESCRIPTIONS
PIN NO.
SYMBOL
TYPE
DESCRIPTION
1
V
EE1
Power Supply
. Most negative power supply connection.
2
V
EE1
Power Supply
. Most negative power supply connection.
3
V
EE1
Power Supply.
Most negative power supply connection.
4
V
EE1
Power Supply.
Most negative power supply connection.
5,6
DDI/DDI
Input
Direct Data Inputs (true and inverse).
Pseudo-ECL, differential serial data inputs.
They may be
directly driven from true ECL drivers when V
EE
= -5V and V
CC
= 0 V.
7
V
CC1
Power Supply
. Most positive power supply connection. (Phase Detector, Carrier Detect).
8, 9
V
EE1
Power Supply
. Most negative power supply connection.
10 /2 EN
Input
/2 Enable-
TTL compatible input used to enable the divide by 2 function.
11 V
EE3
Power Supply.
Most negative power supply connection. (VCO, MUX, Standard Select)
12
LOOP FILT
Loop Filter.
Node for connecting the loop filter components.
13
R
VCO0
Input
VCO Resistor 0.
Analog current input used to set the centre frequency of the VCO when the two
Standard Select bits (pins 20 and 21) are set LOW. A resistor is connected from this pin to V
EE
.
14
R
VCO1
Input
VCO Resistor 1.
Analog current input used to set the centre frequency of the VCO when Standard
Select bit 0 (pin 20) is set HIGH and bit 1 (pin 21) is set LOW. A resistor is connected from this pin to V
EE
.
15
R
VCO2
Input
VCO Resistor 2.
Analog current input used to set the centre frequency of the VCO when Standard
Select bit 0 (pin 20) is set LOW and bit 1 (pin 21) is set HIGH. A resistor is connected from this pin to V
EE
.
16 V
EE3
Power Supply
. Most negative power supply connection.
17 R
VCO3
Input
VCO Resistor 3.
Analog current input used to set the centre frequency of the VCO when the two
Standard Select bits (pins 20 and 21) are set HIGH. A resistor is connected from this pin to V
EE
.
Fig. 2 GS9015B Pin Connections
SD0
SD0
SC0
SC0
SS1
SS0
CD
DDI
DDI
VCC1
VEE1
VEE1
VEE1 VEE1 VEE1 VEE1 VEE1 VEE2 VCC3
GS9015B
TOP VIEW
LOOP RVCO0 RVCO1 RVCO2 VEE3 RVCO3 VCC2
FILT
25
24
23
22
21
20
19
5
6
7
8
9
10
11
12 13 14 15 16 17 18
4 3 2 28 27 26
/2 EN
VEE3
5 of 13
32467 - 0
NOT RECOMMENDED
FOR NEW DESIGNS
PIN NO SYMBOL TYPE
DESCRIPTION
18 V
CC2
Power Supply.
Most positive power supply connection. (VCO, MUX, Standard Select).
19
CD
Output
Carrier Detect
. Open collector output which goes HIGH when a signal is present at either the Serial
Data inputs or the Direct Digital inputs. This output is used in conjunction with the GS9000B or GS9000S
in the Automatic Standards Select Mode to disable the 2 bit standard select counter. This pin should
see a low AC impedance (e.g. 1nF to AC Gnd)
20,21
SS0, SS1 Inputs
Standard Select Inputs.
TTL inputs to the 2:4 multiplexer used to select one of four VCO
centre
frequency setting resistors (R
VCO0
- R
VCO3
). When both SS0 and SS1 are LOW, R
VCO0
is selected.
When SS0 is HIGH and SS1 is LOW, R
VCO1
is selected. When SS0 is LOW and SS1 is HIGH, R
VCO2
is selected and when both SS0 and SS1 are HIGH, R
VCO3
is selected. These pins should see a
low AC impedance (e.g. 1nF to AC Gnd)
22,23 SCO/SCO Outputs
Serial Clock Outputs (inverse and true).
Pseudo-ECL differential outputs of the extracted serial clock.
These outputs require a 390
pull-down resistors to V
EE
.
24,25
SDO/SDO Outputs
Serial Data Outputs (inverse and true).
Pseudo-ECL differential outputs of the regenerated serial data.
These outputs require a 390
pull-down resistors to V
EE
.
26
V
CC3
Power Supply.
Most positive power supply connection. (ECL Outputs).
27
V
EE2
Power Supply.
Most negative power supply connection. (Phase Detector, Carrier Detect)
28
V
EE1
Power Supply
. Most negative power supply connection.
GS9015B PIN DESCRIPTIONS cont.
+
-
2k
2k
1k
1k
1.6V
DDI
Pin 5
Pin 6
DDI
V
CC
1.2V
+
-
380A
Fig. 3 Pins 1, 5 and 6
INPUT / OUTPUT CIRCUITS
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