HD74AC538
1-of-8 Decoder with 3-State Output
Description
The HD74AC538 decoder/demultiplexer accepts three Address (A0 to A2) input signal and decodes them
to select one of eight mutually exclusive outputs. A polarity control input (P) determines whether the
outputs are active LOW or active HIGH. A HIGH signal on either of the active LOW output Enable (
OE)
inputs forces all outputs to the high impedance state. Two active HIGH and two active LOW input enables
are available for easy expansion to 1-of-32 decoding with four packages, or for data demultiplexing to 1-of-
8 or 1-of-16 destinations.
Features
Output Polarity Control
Data Demultiplexing Capability
Multiple Enables for Expansion
Outputs Source/Sink 24 mA
HD74AC538
3
Pin Names
A
0
to A
2
Address Inputs
E
1
, E
2
Enable Inputs (Active LOW)
E
3
, E
4
Enable Inputs (Active HIGH)
P
Polarity Control Input
OE
1
,
OE
2
Output Enable Inputs (Active LOW)
O
0
to O
7
3-State Outputs
Logic Diagram
O
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
A
2
A
1
A
0
P
E
1
E
2
E
3
E
4
OE
1
OE
2
HD74AC538
4
Truth Table
Inputs
Outputs
Function
OE
1
OE
2
E
1
E
2
E
3
E
4
A
2
A
1
A
0
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
High impedance
H
X
X
X
X
X
X
X
X
X
Z
Z
Z
Z
Z
Z
Z
Z
H
X
X
X
X
X
X
X
Z
Z
Z
Z
Z
Z
Z
Z
Disable
L
L
H
X
X
X
X
X
X
Outputs equal input
L
L
X
H
X
X
X
X
X
L
L
X
X
L
X
X
X
X
L
L
X
X
X
L
X
X
X
Active HIGH output
L
L
L
L
H
H
L
L
L
H
L
L
L
L
L
L
L
(P = L)
L
L
L
L
H
H
L
L
H
L
H
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
L
L
H
L
L
L
L
L
L
L
L
L
H
H
L
H
H
L
L
L
H
L
L
L
L
L
L
L
L
H
H
H
L
L
L
L
L
L
H
L
L
L
L
L
L
L
H
H
H
L
H
L
L
L
L
L
H
L
L
L
L
L
L
H
H
H
H
L
L
L
L
L
L
L
H
L
L
L
L
L
H
H
H
H
H
L
L
L
L
L
L
L
H
Active LOW output
L
L
L
L
H
H
L
L
L
L
H
H
H
H
H
H
H
(P = L)
L
L
L
L
H
H
L
L
H
H
L
H
H
H
H
H
H
L
L
L
L
H
H
L
H
L
H
H
L
H
H
H
H
H
L
L
L
L
H
H
L
H
H
H
H
H
L
H
H
H
H
L
L
L
L
H
H
H
L
L
H
H
H
H
L
H
H
H
L
L
L
L
H
H
H
L
H
H
H
H
H
H
L
H
H
L
L
L
L
H
H
H
H
L
H
H
H
H
H
H
L
H
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
L
H :
High Voltage Level
L
:
Low Voltage Level
X :
Immaterial
Z
:
High Impedance
DC Characteristics (unless otherwise specified)
Item
Symbol
Max
Unit
Condition
Maximum quiescent supply current
I
CC
80
A
V
IN
= V
CC
or ground, V
CC
= 5.5 V,
Ta = Worst case
Maximum quiescent supply current
I
CC
8.0
A
V
IN
= V
CC
or ground, V
CC
= 5.5 V,
Ta = 25
C
HD74AC538
5
AC Characteristics: HD74AC538
Ta = +25
C
C
L
= 50 pF
Ta = 40
C to +85
C
C
L
= 50 pF
Item
Symbol
V
CC
(V)*
1
Min
Typ
Max
Min
Max
Unit
Propagation delay
t
PLH
3.3
1.0
10.5
17.5
1.0
20.0
ns
A
n
to O
n
5.0
1.0
8.0
12.5
1.0
14.0
Propagation delay
t
PHL
3.3
1.0
9.5
17.5
1.0
20.0
ns
A
n
to O
n
5.0
1.0
7.0
12.0
1.0
14.0
Propagation delay
t
PLH
3.3
1.0
11.0
19.5
1.0
23.0
ns
E
1
, or
E
2
to O
n
5.0
1.0
8.0
14.5
1.0
16.5
Propagation delay
t
PHL
3.3
1.0
10.0
19.5
1.0
23.0
ns
E
1
, or
E
2
to O
n
5.0
1.0
8.0
14.0
1.0
16.5
Propagation delay
t
PLH
3.3
1.0
11.0
19.5
1.0
23.0
ns
E
3
, or
E
4
to O
n
5.0
1.0
8.5
14.5
1.0
17.0
Propagation delay
t
PHL
3.3
1.0
10.5
20.0
1.0
23.5
ns
E
3
, or
E
4
to O
n
5.0
1.0
8.0
15.0
1.0
18.0
Propagation delay
t
PLH
3.3
1.0
10.5
15.5
1.0
17.5
ns
P to O
n
5.0
1.0
9.0
11.0
1.0
12.5
Propagation delay
t
PHL
3.3
1.0
9.0
15.0
1.0
17.0
ns
P to O
n
5.0
1.0
7.5
10.5
1.0
11.5
Propagation delay
t
PZH
3.3
1.0
7.0
14.0
1.0
15.5
ns
OE
n
to O
n
5.0
1.0
5.0
8.5
1.0
9.5
Propagation delay
t
PZL
3.3
1.0
8.5
16.5
1.0
19.0
ns
OE
n
to O
n
5.0
1.0
5.5
9.5
1.0
11.5
Propagation delay
t
PHZ
3.3
1.0
7.0
14.0
1.0
15.5
ns
OE
n
to O
n
5.0
1.0
6.0
10.5
1.0
11.5
Propagation delay
t
PLZ
3.3
1.0
9.0
14.5
1.0
17.0
ns
OE
n
to O
n
5.0
1.0
7.0
10.5
1.0
12.0
Note:
1. Voltage Range 3.3 is 3.3 V
0.3 V
Voltage Range 5.0 is 5.0 V
0.5 V
Capacitance
Item
Symbol
Typ
Unit
Condition
Input capacitance
C
IN
4.5
pF
V
CC
= 5.5 V
Power dissipation capacitance
C
PD
100
pF
V
CC
= 5.0 V
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