HT1609L

40 Channel LCD Driver

Block Diagram

Features

Operating voltage: 2.7V~5.2V

Bias voltage: static~1/5 bias

LCD driving voltage: 3.0V~5.0V

40 internal LCD drivers available

LCD driver with serial/parallel conversion
function

General Description

The HT1609L is an LCD driver LSI with 2

output channels using CMOS technology. It is
equipped with two sets of 40-bit bidirectional
shift registers, 40-bit data latches, 40-bit LCD
drivers, and logic control circuits.

The HT1609L can convert serial data received

from an LCD controller into parallel data and
send out LCD driving waveforms to the LCD
panel. The HT1609L is designed for general
purpose LCD drivers. It can drive both static
and dynamic drive LCDs. The LSI can be used
as segment driver.

Applications

Electronic dictionaries

Portable computers

Remote controllers

Calculators

25th Aug '98

Pad Coordinates

Unit: mil

Pad No.

75.27

44.20

75.22

43.31

75.27

39.01

75.22

38.25

75.27

33.83

75.22

33.19

75.27

28.65

75.22

28.14

75.27

23.46

75.22

23.08

75.27

18.27

75.22

18.02

75.27

13.09

75.22

12.96

75.27

7.91

75.22

7.91

75.27

2.63

75.22

2.85

75.27

2.55

75.22

2.21

75.27

7.61

75.22

7.27

75.27

12.66

75.22

12.32

75.27

17.85

75.22

17.38

75.27

23.12

75.22

22.44

75.27

28.31

75.22

27.50

75.27

33.58

75.22

32.56

75.27

38.76

75.22

37.61

75.27

43.99

75.22

42.67

70.34

45.73

70.17

45.13

65.49

45.73

65.32

45.13

60.65

45.73

60.48

45.13

55.80

45.73

55.63

45.13

50.96

45.73

50.79

45.13

46.11

45.73

45.94

45.13

41.27

45.73

41.10

45.13

36.42

45.73

36.25

45.13

31.58

45.73

31.41

45.13

26.73

45.73

26.56

45.13

21.89

45.73

21.72

45.13

17.04

45.73

16.87

45.13

12.20

45.73

12.03

45.13

7.35

45.73

7.18

45.13

2.51

45.73

2.34

45.13

2.34

45.73

2.51

45.13

7.18

45.73

7.35

45.13

12.03

45.73

12.20

45.13

16.87

45.73

17.04

45.13

21.72

45.73

21.89

45.13

26.56

45.73

26.73

45.13

31.41

45.73

31.58

45.13

36.25

45.73

36.42

45.13

41.10

45.73

41.27

45.13

45.94

45.73

46.11

45.13

50.79

45.73

50.96

45.13

55.63

45.73

55.80

45.13

60.48

45.73

60.65

45.13

65.32

45.73

65.49

45.13

70.17

45.73

70.34

45.13

HT1609L

25th Aug '98

Pad Description

Pad No.

Pad Name I/O

Description

LCD driver output for channel 1

VEE

LCD power supply

3~6

V1~V4

LCD bias supply voltage for LCD driver

VSS

Power supply (ground)

CLK1

Clock to latch serial data on the falling edge (Note 1)

SHF1

Shift direction selection of channel 1 shift register (Note 2)

SHF2

Shift direction selection of channel 2 shift register (Note 2)

VDD

Power supply ( positive )

CLK2

Clock to shift serial data on the falling edge (Note 1)

DL1

I/O Data input/output of channel 1 shift register

DR1

I/O Data input/output of channel 1 shift register

DL2

I/O Data input/output of channel 2 shift register

DR2

I/O Data input/output of channel 2 shift register

ALT

Alternate signal input for LCD driving waveform

18~57

Y40~Y79

LCD driver outputs for channel 2

58~96

Y39~Y1

LCD driver outputs for channel 1

Note 1: Data is processed on the clock falling or rising edge as shown in the following table.

HT1609L

25th Aug '98

The output levels of channel 1 and 2 are decided by the combination of ALT
and latched data. Refer to the following table:

Latched Data

ALT

Channel 1

(Y0~Y39)

Channel 2

(Y40~Y79)

(Selected)

(Non-selected)

Note 2 : Shift direction of channel 1 and 2

Shift Direction of Channel 1 (Channel 2)

SHF1 (SHF2)

Shift Direction

DL1 (DL2)

DR1 (DR2)

Y39 to Y0 (Y79 to Y40)

OUT

Y0 to Y39 (Y40 to Y79)

OUT

Absolute Maximum Ratings*

Supply Voltage .............................. 0.3V to 5.5V

Storage Temperature................. 50

C to 125

Input Voltage..................V

0.3V to V

+0.3V

Operating Temperature............... 20

C to 70

*Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute Maxi-

mum Ratings" may cause substantial damage to the device. Functional operation of this
device at other conditions beyond those listed in the specification is not implied and prolonged
exposure to extreme conditions may affect device reliability.

HT1609L

25th Aug '98

D.C. Characteristics

Ta=25

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Conditions

Operating Voltage

2.7

5.2

Operating Current

No load

100

300

STB

Standby Current

"L" Input Voltage

"H" Input Voltage

"L" Output Voltage

=+0.4mA

0.4

"H" Output Voltage

=0.4mA

4.6

LCD

LCD Driving Voltage

5.0

A.C. Characteristics

Ta=25

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

Conditions

CLK2

Data Shift Frequency

400

kHz

WCKH

Clock High Level Width

800

WCKL

Clock Low Level Width

800

Data Setup Time

300

Data Hold Time

300

Data Delay Time

500

SUC1

Clock Setup Time

CLK2

CLK1

500

SUC2

Clock Setup Time

CLK1

CLK 2

500

Clock Rise/Fall Time

200

HT1609L

25th Aug '98

Functional Description

The HT1609L is an LCD driver LSI with 2

segment output channel. It operates with a con-
troller, such as HT163A, or another segment
driver LSI HT1608, HT1608L and HT1609L.

Clock

The CLK1 is the clock to latch data on the
falling edge. It latches the data input from the
bidirectional shift register at the falling edge of
CLK1 and transfers its outputs to the LCD
driver circuit. The CLK2 is the clock to shift
data on the falling edge. It shifts the serial data
at the falling of CLK2 and transfers the output
of each bit of the register to the latch circuit
(refer to Note 1).

Bidirectional shift register

The HT1609L supplies two sets of 40-bit shift
register, which controls the shift direction by
SHF1 & SHF2. The SHF1 controls the 1st 40-
bit shift register, and SHF2 controls the 2nd
40-bit shift register. When SHF1 is connected to
VDD, the 1st shift direction is from Y39 to Y0;
when SHF1 is connected to VSS, the shift direc-
tion changes from Y0 to Y39. When SHF2 is
connected to VDD, the 2nd shift direction is
from Y79 to Y40; when SHF2 is connected to
VSS, the shift direction changes from Y40 to

Y79 (refer to Note 2).

Data input/output

The DL1, DR1, DL2, DR2 are data input or
output option function. When SHF1 (SHF2) is
connected to VDD, the 40th bit data of the 1st
(2nd) 40-bit shift register outputs from DL1
(DL2) ; when SHF1 (SHF2) is connected to VSS
or open , the 1~40 (41~80) bits data from LCD
controller enter into the 1st (2nd) 40-bit shift
through DL1 (DL2).

When SHF1 (SHF2) is connected to VDD, the
1~40 (41~80) bit data from the LCD controller
enter into the 1st (2nd)40-bit shift register
through DR1 (DR2); when SHF1 (SHF2) is con-
nected to VSS or open , the 40th bit shift regis-
ter outputs from DR1 (DR2) (refer to Note 2).

LCD driver circuit

Select one of the four levels of voltage V1, V2,
V3,and V4 for driving an LCD and transfer it to
the output terminals according to the combina-
tion of alternate signal (ALT) and the data in
the latch circuit (refer to Note 1).

HT1609L

25th Aug '98

Timing Diagrams

Static driver

When the HT1609L is used as a static driver,
data is transferred on the falling edge of CLK2
and latched on the falling edge of CLK1. The
frequency of CLK1 becomes the frame fre-
quency of the LCD driver. The frequency of ALT

has to be twice the frequency of CLK1. ALT has
to be synchronized on the falling edge of CLK1.

The power supply for the LCD driver is used by
shortening V1, V4 or V2, V3. The application
circuit connections are shown below:

HT1609L

25th Aug '98

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HT1609

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HT1609

Document Outline

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: HT1609