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Электронный компонент: HT46C23/HT46R23

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HT46R23/HT46C23
8-Bit A/D Type MCU
I
2
C is a trademark of Philips Semiconductors.
Rev. 1.30
1
March 26, 2003
General Description
The HT46R23/HT46C23 are 8-bit, high performance,
RISC architecture microcontroller devices specifically
designed for A/D applications that interface directly to
analog signals, such as those from sensors. The mask
version HT46C23 is fully pin and functionally compatible
with the OTP version HT46R23 device.
The advantages of low power consumption, I/O flexibil-
ity, programmable frequency divider, timer functions,
oscillator options, multi-channel A/D Converter, Pulse
Width Modulation function, I
2
C interface, HALT and
wake-up functions, enhance the versatility of these de-
vices to suit a wide range of A/D application possibilities
such as sensor signal processing, motor driving, indus-
trial control, consumer products, subsystem controllers,
etc.
Features
Operating voltage:
f
SYS
=4MHz: 2.2V~5.5V
f
SYS
=8MHz: 3.3V~5.5V
23 bidirectional I/O lines (max.)
1 interrupt input shared with an I/O line
16-bit programmable timer/event counter with
overflow interrupt and 7-stage prescaler
On-chip crystal and RC oscillator
Watchdog Timer
4096
15 program memory
192
8 data memory RAM
Supports PFD for sound generation
HALT function and wake-up feature reduce power
consumption
Up to 0.5
ms instruction cycle with 8MHz system clock
at V
DD
=5V
8-level subroutine nesting
8 channels 10-bit resolution (9-bit accuracy)
A/D converter
2-channel (6+2)/(7+1)-bit PWM output shared with
two I/O lines
Bit manipulation instruction
15-bit table read instruction
63 powerful instructions
All instructions in one or two machine cycles
Low voltage reset function
I
2
C Bus (slave mode)
24/28-pin SKDIP/SOP packages
Block Diagram
Pin Assignment
HT46R23/HT46C23
Rev. 1.30
2
March 26, 2003
P A 5 / I N T
O S C 2
O S C 1
R E S
V D D
M U X
P A C
P A
P o r t A
P A 4 / T M R
S Y S C L K / 4
W D T
P D C
P D
P o r t D
P D 0 / P W M 0 ~ P D 1 / P W M 1
P o r t B
T M R
T M R C
V S S
P r e s c a l e r
f
S Y S
P A 4
P r o g r a m
R O M
P r o g r a m
C o u n t e r
I n t e r r u p t
C i r c u i t
S T A C K
I N T C
D A T A
M e m o r y
I n s t r u c t i o n
R e g i s t e r
M
U
X
I n s t r u c t i o n
D e c o d e r
S T A T U S
A L U
S h i f t e r
T i m i n g
G e n e r a t o r
A C C
R C O S C
W D T
P r e s c a l e r
M
U
X
M
U
X
M P
P B
P B C
P B 0 / A N 0 ~ P B 7 / A N 7
P A 0 ~ P A 2
P A 3 / P . D
P A 4 / T M R
P A 5 / I N T
P A 6 / S D A
P A 7 / S C L
P W M
8 - C h a n n e l
A / D C o n v e r t e r
P A 3 / P . D
L V R
P A 3 , P A 5
P C
P C C
P C 0 ~ P C 4
I
2
C B u s
S l a v e M o d e
P o r t C
H T 4 6 R 2 3 / H T 4 6 C 2 3
2 8 S K D I P - A / S O P - A
2 8
2 7
2 6
2 5
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
P B 5 / A N 5
P B 4 / A N 4
P A 3 / P . D
P A 2
P A 1
P A 0
P B 3 / A N 3
P B 2 / A N 2
P B 1 / A N 1
P B 0 / A N 0
V S S
P C 0
P C 1
P C 2
P B 6 / A N 6
P B 7 / A N 7
P A 4 / T M R
P A 5 / I N T
P A 6 / S D A
P A 7 / S C L
O S C 2
O S C 1
V D D
R E S
P D 1 / P W M 1
P D 0 / P W M 0
P C 4
P C 3
P B 5 / A N 5
P B 4 / A N 4
P A 3 / P . D
P A 2
P A 1
P A 0
P B 3 / A N 3
P B 2 / A N 2
P B 1 / A N 1
P B 0 / A N 0
V S S
P C 0
P B 6 / A N 6
P B 7 / A N 7
P A 4 / T M R
P A 5 / I N T
P A 6 / S D A
P A 7 / S C L
O S C 2
O S C 1
V D D
R E S
P D 0 / P W M 0
P C 1
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
H T 4 6 R 2 3 / H T 4 6 C 2 3
2 4 S K D I P - A / S O P - A
Pad Assignment
HT46C23
* The IC substrate should be connected to VSS in the PCB layout artwork.
Pad Description
Pad Name
I/O
Option
Description
PB0/AN0
PB1/AN1
PB2/AN2
PB3/AN3
PB4/AN4
PB5/AN5
PB6/AN6
PB7/AN7
I/O
Pull-high
Bidirectional 8-bit input/output port. Software instructions determine the
CMOS output, Schmitt trigger input with or without pull-high resistor (deter-
mined by pull-high: port option) or A/D input.
Once a PB line is selected as an A/D input (by using software control), the
I/O function and pull-high resistor are disabled automatically.
PA0~PA2
PA3/PFD
PA4/TMR
PA5/INT
PA6/SDA
PA7/SCL
I/O
Pull-high
Wake-up
PA3 or PFD
I/O or Serial Bus
Bidirectional 8-bit input/output port. Each bit can be configured as wake-up
input by options. Software instructions determine the CMOS output or
Schmitt trigger input with or without pull-high resistor (determined by
pull-high options: bit option). The PFD, TMR and INT are pin-shared with
PA3, PA4 and PA5, respectively. Once the I
2
C Bus function is used, the in-
ternal registers related to PA6 and PA7 can not be used.
VSS
Negative power supply, ground.
PC0~PC4
I/O
Pull-high
Bidirectional 5-bit input/output port. Software instructions determine the
CMOS output, Schmitt trigger input with or without pull-high resistor (deter-
mine by pull-high option: port option).
HT46R23/HT46C23
Rev. 1.30
3
March 26, 2003
1
2
3
4
5
6
8
7
9
1 0
1 1 1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
2 7
2 8
2 9
3 0
3 1
3 2
3 3
( 0 , 0 )
P A 0
P B 3 / A N 3
P B 2 / A N 2
P B 1 / A N 1
P B 0 / A N 0
V S S
V S S
P
C
0
P
C
1
P
C
2
P
C
3
P
C
4
P
D
0
/
P
W
M
0
P
D
1
/
P
W
M
1
T E S T 1
R
E
S
O S C 1
V D D
V D D
T E S T 3
T E S T 2
P A 7 / S C L
O S C 2
P
A
5
/
I
N
T
P
A
4
/
T
M
R
P
B
7
/
A
N
7
P
B
6
/
A
N
5
P
B
5
/
A
N
5
P
B
4
/
A
N
4
P
A
3
/
P
.
D
P
A
6
/
S
D
A
P
A
2
P
A
1
Pad Name
I/O
Option
Description
PD0/PWM0
PD1/PWM1
I/O
Pull-high
I/O or PWM
Bidirectional 2-bit input/output port. Software instructions determine the
CMOS output, Schmitt trigger input with or without a pull-high resistor (de-
termined by pull-high option: port option). The PWM0/PWM1 output func-
tion are pin-shared with PD0/PD1 (dependent on PWM options).
RES
I
Schmitt trigger reset input. Active low.
VDD
Positive power supply
OSC1
OSC2
I
O
Crystal
or RC
OSC1, OSC2 are connected to an RC network or a Crystal (determined by
options) for the internal system clock. In the case of RC operation, OSC2 is
the output terminal for 1/4 system clock.
TEST1
TEST2
TEST3
I
TEST mode input pin.
It disconnects in normal operation.
Absolute Maximum Ratings
Supply Voltage ...........................V
SS
-0.3V to V
SS
+6.0V
Storage Temperature ............................
-50C to 125C
Input Voltage..............................V
SS
-0.3V to V
DD
+0.3V
Operating Temperature...........................
-40C to 85C
Note: These are stress ratings only. Stresses exceeding the range specified under
Absolute Maximum Ratings may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
D.C. Characteristics
Ta=25
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
V
DD
Operating Voltage
f
SYS
=4MHz
2.2
5.5
V
f
SYS
=8MHz
3.3
5.5
V
I
DD1
Operating Current
(Crystal OSC)
3V
No load, f
SYS
=4MHz
ADC disable
0.6
1.5
mA
5V
2
4
mA
I
DD2
Operating Current
(RC OSC)
3V
No load, f
SYS
=4MHz
ADC disable
0.8
1.5
mA
5V
2.5
4
mA
I
DD3
Operating Current
5V
No load, f
SYS
=8MHz
ADC disable
3
5
mA
I
STB1
Standby Current
(WDT Enabled)
3V
No load, system HALT
5
mA
5V
10
mA
I
STB2
Standby Current
(WDT Disabled)
3V
No load, system HALT
1
mA
5V
2
mA
V
IL1
Input Low Voltage for I/O Ports,
TMR and INT
0
0.3V
DD
V
V
IH1
Input High Voltage for I/O Ports,
TMR and INT
0.7V
DD
V
DD
V
V
IL2
Input Low Voltage (RES)
0
0.4V
DD
V
V
IH2
Input High Voltage (RES)
0.9V
DD
V
DD
V
V
LVR
Low Voltage Reset
2.7
3
3.3
V
HT46R23/HT46C23
Rev. 1.30
4
March 26, 2003
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
I
OL
I/O Port Sink Current
3V
V
OL
=0.1V
DD
4
8
mA
5V
V
OL
=0.1V
DD
10
20
mA
I
OH
I/O Port Source Current
3V
V
OH
=0.9V
DD
-2
-4
mA
5V
V
OH
=0.9V
DD
-5
-10
mA
R
PH
Pull-high Resistance
3V
40
60
80
k
W
5V
10
30
50
k
W
V
AD
A/D Input Voltage
0
V
DD
V
E
AD
A/D Conversion Error
0.5
1
LSB
I
ADC
Additional Power Consumption
if A/D Converter is Used
3V
0.5
1
mA
5V
1.5
3
mA
A.C. Characteristics
Ta=25
C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
DD
Conditions
f
SYS
System Clock
2.2V~5.5V
400
4000
kHz
3.3V~5.5V
400
8000
kHz
f
TIMER
Timer I/P Frequency (TMR)
2.2V~5.5V
0
4000
kHz
3.3V~5.5V
0
8000
kHz
t
WDTOSC
Watchdog Oscillator Period
3V
45
90
180
ms
5V
32
65
130
ms
t
RES
External Reset Low Pulse Width
1
ms
t
SST
System Start-up Timer Period
Wake-up from HALT
1024
*t
SYS
t
INT
Interrupt Pulse Width
1
ms
t
AD
A/D Clock Period
1
ms
t
ADC
A/D Conversion Time
76
t
AD
t
ADCS
A/D Sampling Time
32
t
AD
t
IIC
I
2
C Bus Clock Period
Connect to external
pull-high resistor 2k
W
64
*t
SYS
Note: *t
SYS
=1/f
SYS
HT46R23/HT46C23
Rev. 1.30
5
March 26, 2003